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api_user_11797_Asif
api_user_11797_Asif published:

Virtual Damping and Einstein Relation

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IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 38, NO. 3, MARCH 2003 / 407 / Virtual Damping and Einstein

10/18/2008
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api_user_11797_Asif published:

Ring Osc Ref1

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24.4 / CMOS Transceiver with Baud Rate Clock Recovery for Optical Interconnects / Azita Emami-Neyestana

10/18/2008
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api_user_11797_Asif published:

Ring_osc

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IEEE 2005 CUSTOM INTEGRATED CIRCUITS CONFERENCE / Differential Ring Oscillators with Multipath Delay

10/18/2008
api_user_11797_Asif
api_user_11797_Asif published:

Precise Delay Generation

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IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 28, NO. 12, DECEMBER 1993 / 1273 / Precise Delay Generation

10/18/2008
api_user_11797_Asif
api_user_11797_Asif published:

PHD Thesis on PLL

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UNIVERSITY OF CALIFORNIA Los Angeles / Low-Power Low-Jitter On-Chip Clock Generation / A dissertation

10/18/2008
api_user_11797_Asif
api_user_11797_Asif published:

Phase Noise a Unifying Theory

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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: FUNDAMENTAL THEORY AND APPLICATIONS, VOL. 47, NO. 5, MA

10/18/2008
api_user_11797_Asif
api_user_11797_Asif published:

Inductor Less Oscillator Design

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Inductorless oscillator design for personal communications devices A 1.2 pm CMOS process case study /

10/18/2008
api_user_11797_Asif
api_user_11797_Asif published:

Gen Theory of Phase Noise

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IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 33, NO. 2, FEBRUARY 1998 / 179 / A General Theory of Phase

10/18/2008
api_user_11797_Asif
api_user_11797_Asif published:

A Quadrature Output Voltage Controlled Ring Oscillator Ba...

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A Quadrature Output Voltage Controlled Ring Oscillator Based on Three-Stage Sub-feedback Loops / Lizho

10/18/2008
api_user_11797_Asif
api_user_11797_Asif published:

Analysis Of Timing Jitter

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27 / Analysis of Timing Jitter in CMOS Ring Oscillators / Todd C. Weigandt, Beomsup Kim*, Paul R. Gray /

10/18/2008
api_user_11797_Asif
api_user_11797_Asif published:

A 5.9-GHz Voltage Controlled Ring Oscillator in 0

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230 / IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 39, NO. 1, JANUARY 2004 / A 5.9-GHz Voltage-Controlle

10/18/2008
api_user_11797_Asif
api_user_11797_Asif published:

Design Strategies for Source Coupled Logic Gates

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640 / IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: FUNDAMENTAL THEORY AND APPLICATIONS, VOL. 50, NO.

10/18/2008
api_user_11797_Asif
api_user_11797_Asif published:

Design and Comparison of Cmos Current Mode Logic Latches

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DESIGN AND COMPARISON OF CMOS CURRENT MODE LOGIC LATCHES Muhammad Usama and Tad Kwasniewski Departme

10/18/2008
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api_user_11797_Asif published:

Determination of Stability Using Return Ratio in Balanced...

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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-11: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 42, NO. 12,

10/18/2008
api_user_11797_Asif
api_user_11797_Asif published:

Continuous-Time Common Mode Feed Back Networks for Fully ...

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Continuous-time common-mode feedback networks for fully-differential amplifiers: a comparative study

10/18/2008

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