ABOUT US LIET was established in 2003, with an aim to provide the platform for the professional students to launch

promising careers in the disciplines of ECE,CSE, EEE, ME, IT, CIVIL with MBA, M.Tech (ES&VLSID,CSE,SE,PE,DSCE,WMC, Structural Engg.) It is trying to prove its ability and serve student community. It emphasizes on imparting quality standard education and is striving to develop the college as model institute in the near future especially catering to the growing academic and technical demands of engineering . ABOUT THE DEPARTMENT: The course will be organized by Department of Electronics and Communication Engineering in collaboration with IETE Hyderabad centre. We have well experienced faculty members from teaching and industrial background. Department has acquired National reputation through national symposium like Sanketika. We have gained expertise for organizing workshops, Seminars, FDPs, Programs on various challenging topics catering to the industrial requirements. students. The college is ISO 9001:2000 Certified and is NBA accreditated.

ORGANIZING COMMITTEE SECRETARY Mrs. RIZWANA BEGUM JOINT SECRETARY Mr. SYED TAUSEEF AHMED PRINCIPAL Dr. SYED AMJAD ALI ADVISORY COMMITTEE Prof.V. Bhagya Raju, (HOD ECE) -(Convener) G.Ravi Kishore, Asoc.Prof.(Coordinator) Mr.Vinay Chowdary, Asst. Prof-(Coordinator) IN COLLABORATION WITH

A Two Day National Workshop on

Analog & Digital CMOS IC Design flow using Mentor graphics EDA Tools

Organized by

Department of ECE
LORDS INSTITUTE OF ENGINEERING AND TECHNOLOGY

Address for Correspondence Coordinators Department of ECE, Sy-No.:32, Himayathsagar, Hyderabad - 08 Andhra Pradesh, INDIA. Mobile: +91-8500000056, 9392335901.

ACCREDITATED BY NBA

On 12th & 13th September 2012

-------------------------------------Sy-No.:32, Himayathsagar, Hyderabad A.P, 500028 INDIA.

Mr.Nagarjuna

PROGRAMME INFORMATION

Day 1: Pre-talk: Dr. Asha Rani, Professor, Dept. of ECE, JNTUH

Technical Session1: Backend VLSI Design Flow By Mr. Mahboob-ul-Haq, Senior Place & Route Consultant, AMD, Hyderabad Technical Session 2:Physical Design Concepts & Hands on Exercise using Pysxis Tool Flow By Mr.Sharath kanth. M & Core-el Team Designation: Application Engineer Technical Session 3: Hands on Experience by: 1. Mr. Sharath Kanth,Application Engineer 2. Mrs. M Nirmala,Assoc. Prof.,ECE,LIET 3. Mr. G Ravi Kishore,Assoc. Prof.,ECE,LIET

ABOUT THE WORKSHOP The aim of this workshop is to give an overview and hands-on experience to the participants on the State-of- art EDA tools for VLSI Design. This workshop is comprised of lectures delivered by Application engineers from top MNC Company followed by hands-on training on design. The participants will have an exposure to the Circuit design & Simulation, Layout design, Physical Verification, Extraction, with hands-on session on the design and simulation tools and a real experience of using the standard cell design flow which is required for ASIC design. This course will be a great experience for the people who are interested to learn the techniques of Analog IC Design as well. This workshop will be beneficial for the participants to develop an EDA (Electronic Design Automation) Lab. As workshop is conducted on National level participants from other states are expected. ELIGIBILITY OF THE APPLICANT Faculty from Engg. Colleges, Research Scholars from the field of VLSI Design and UG & PG students.
ORGANIZING COMMITTEE MEMBERS (ECE) Prof.V.Bhagya Raju, HOD ECE -(Convener) Prof.Mohammed Jawaharin Basha Mr.S.V.Altaf Mrs.M.Nirmala Mr G.Ravi Kishore (Coordinator) Mr.Parameswar MR.Vinay Chowdary (Coordinator) Mr.D.Sreekanth Ms.Sunitha Mr. Pavan Kumar Mrs.V. Indu Priya Ms. Belcy D. Mathews Mr.Rajeswar reddy

Mrs.Rajitha Ms. Pravallika Mrs.Manju Mrs. Anusha Ms. S. Safiya Mr.I.Venu Mr. D Prasad.

REGISTRATION FORM

Analog & Digital CMOS IC Design flow using Mentor graphics EDA Tools -2012
(12th & 13th September 2012 )

Day 2:
Technical Session1:"Low Power VLSI Design" By Mr. Mahboob-ul-Haq, Senior Place & Route Consultant, AMD, Hyderabad. Technical Session 2:Physical Design Concepts & Hands on Exercise using Pysxis Tool Flow By Mr.Sharath kanth. M & Core-el Team. Designation: Application Engineer Technical Session 3: Hands on Experience by: 1. Mr. Sharanth Kanth,Application Engineer 2. Mrs. M Nirmala,Assoc. Prof.,ECE,LIET 3. Mr. G Ravi Kishore,Assoc. Prof.,ECE,LIET

1. Full name (in Block letters): 2. Designation: 3. Organization: 4. Mailing Address: . . ............... .................................................. 5.Mobile: 6. E-mail: 7. I wish to participate in the Workshop. 8. Amount paid in cash: Rs. 250/-

For IETE Members: Rs. 200/-

Date: Place: Signature of the Participant

Signature of the Sponsoring Authority (With Date and Seal)