Reg. No. :
M.E. DEGREE EXAMINATION, NOVEMBER/DECEMBER 2010First Semester Applied Electronics AP 9212 — ADVANCED DIGITAL SYSTEM DESIGN(Common to M.E. VLSI Design)(Regulation 2009)Time : Three hours Maximum : 100 Marks Answer ALL questionsPART A — (10
2 = 20 Marks)1.
A controlled digital system, a sequential machine and a finite machine one -These three are the same or different?2.
Define Class A, B, C, D, E MACHINES.3.
What is a Unit distance state assignment?4.
Give an example for non critical race.5.
Name the Tolerance techniques.6.
What is the difference between FPLA and PROM?8.
Use 4 × 4 ROM to convert four bit BCD to an Excess -3 code.9.
List the steps involved in VHDL test bench.10.
What is the difference between Behavioral model and test bench?PART B — (5
16 = 80 Marks)11.
(a) Discuss using timing diagram, the operation of a binary cell developedaround NOR gates. Draw a distinction between NAND and NOR cell.What should be the direct consequence of a SET OPERATION?Or(b) Write down the design steps involved in designing Traditionalsynchronous sequential circuits.
Question Paper Code :
4 0 1 4 0 1 4 0 1