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EC2354 -VLSI DESIGN -Unit 5.ppt

EC2354 -VLSI DESIGN -Unit 5.ppt

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Published by Priya Nka
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Published by: Priya Nka on Dec 20, 2012
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02/16/2014

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EC2354 -VLSI DESIGN
 
Syllabus
UNIT I CMOS TECHNOLOGY
 A brief History-MOS transistor, Ideal I-V characteristics, C-Vcharacteristics, Non ideal IV effects, DC transfer characteristics - CMOStechnologies, Layout design Rules, CMOS process enhancements,Technology related CAD issues, Manufacturing issues
UNIT II CIRCUIT CHARACTERIZATION AND SIMULATION
Delay estimation, Logical effort and Transistor sizing, Power dissipation, Interconnect, Design margin, Reliability, Scaling- SPICEtutorial, Device models, Device characterization, Circuit characterization,Interconnect simulation
UNIT III COMBINATIONAL AND SEQUENTIAL CIRCUIT DESIGN
Circuit families
 –
Low power logic design
 –
comparison of circuitfamilies
 –
Sequencing static circuits, circuit design of latches and flip flops,Static sequencing element methodology- sequencing dynamic circuits
 –
 synchronizers
 
Syllabus Contd.,
UNIT IV CMOS TESTING
Need for testing- Testers, Text fixtures and test programs- Logicverification- Silicon debug principles- Manufacturing test
 –
Design for testability
 –
Boundary scan
UNIT V SPECIFICATION USING VERILOG HDL
Basic concepts- identifiers- gate primitives, gate delays, operators,timing controls, procedural assignments conditional statements, Data flowand RTL, structural gate level switch level modeling, Design hierarchies,Behavioral and RTL modeling, Test benches, Structural gate leveldescription of decoder, equality detector, comparator, priority encoder, half adder, full adder, Ripple carry adder, D latch and D flip flop.

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