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A SEMINAR ON

VHDL: ARRAY, RECORD and ACCESS TYPES

INSTRUMENTATION TECHNOLOGY DEPT. RVCE

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Type declaration

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a hardware description language at various level of abstraction should not be limited to Bit or Boolean types VHDL is a highly typed language VHDL allows the use of integers, floating point, and enumerate data types as well as user defined type
It has already arithmetic operators defined for these types

VHDL allows bit and boolean types


It has logical operators defined for these

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VHDL Data Types


INTEGER REAL SCALAR ENUMERATED FILE PHYSICAL TYPES ACCESS ARRAY

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COMPOSITE

RECORD

VECTOR

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Composite Types

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A composite type object is one having multiple elements VHDL composite types consists of arrays and records

The elements can be of any scalar, composite or access type


SYNTAX: composite_type_definition ::= type_definition

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Array Type

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Used to collect one or more elements of a similar type in a single construct Elements can be any VHDL data type

ARRAY is formally defined as follows;


A type, the value of which consists of elements that are all of the same subtype (and hence, of the same type). Each element is uniquely distinguished by an index (for a onedimensional array) or by a sequence of indexes (for a multidimensional array). Each index must be a value of a discrete type and must lie in the correct index range.

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Array Type

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Each object of this data type can hold more than one value. Arrays consist of many similar elements of any data type, including arrays.

The array is declared in a TYPE statement.


The first item is the name of the array.

Second, the range of the array is declared


The third item in the array declaration is the specification of the data type for each element of the array.

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Array Type

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Simplified Syntax:
type type_name is array (range) of element_type

Or
type type_name is array (type range) of element_type

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Array Type

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constrained or unconstrained. constrained if the size of the array is constrained. The size of the array can be constrained using a discrete type mark or a range. In both cases, the number of the elements in the array is known during the compilation. unconstrained if its size is unconstrained Number of elements of unconstrained array type is unknown. The size of a particular object is specified only when it is declared.

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Array Type

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Constrained Array
type Real_Matrix is array (1 to 10) of REAL; type BYTE is array (0 to 7) of BIT; type DATA_BUS is array (0 to 7) of BIT;

Unonstrained Array
type Real_Matrix is array (POSITIVE range <>) of Real; variable Real_Matrix_Object : Real_Matrix (1 to 8);

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Differences between vectors and arrays


VECTOR ARRAY

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A vector is a dynamic array (edit the contents) Only 1 dimension A vector will expand its size as necessary to accommodate new elements Can reserve spaces in between Syntax:
Type_Vector(range);

An array is a static array (just to store values) Multiple dimensions An array is fixed

Cant reserve spaces in between Syntax:


type type_name is array (type range ) of element type

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Array Type:
Library IEEE; Use STD_LOGIC_1164.all;

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example to compare elements

package arr_pkg is constant N: integer := 4; constant M: integer := 3; subtype wordN is STD_LOGIC_VECTOR (M downto 0);

--building a package for array -- no. of elements of array is N+1 -- no of bits of each element is M+1

type string is array (N downto 0) of wordN;


END arr_pkg;

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Array Type:
Library IEEE; Use STD_LOGIC_1164.all; Use work.arr_pkg.all;

example to compare elements


-- using this statement, we can make the --package arr_pkg visible in this module
-- no. of elements of array is N+1 -- no of bits of each element is M+1

Entity large_array is generic (N: integer :=4; M:integer:=3); Port( a: inout strng; z: out std_logic_vector(M downto 0)); End large_array;

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Array Type:
Begin Process( a) Variable great: wordN; Begin;

Architecture arry of large_array is

example to compare elements

a <= (0110, 0111, 0010, 0011, 0001); great := 0000; Loopx : for i in 0 to N loop if (great <= a(i)) then great := a(i); report(great is less than or equal to a); Else report(great is greater than a); end if; end loop loopx; z <= great; End process;

-- data of the array

-- reports that the number is not -- the largest

-- reports that the number is not -- the largest

End arry;

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Record Type

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The second VHDL composite type is the record.

An object of type record may contain elements of different types.


A record type declaration is used to define a record, which is a collection of one or more elements. A TYPE declaration is used to define a record. Note that the types of a record's elements must be defined before the record is defined. Also notice that there is no semi-colon after the word RECORD.

The RECORD and END RECORD keywords bracket the field names.
After the RECORD keyword, the record's field names are assigned and their data types are specified.

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Record Type

Used to collect one or more elements of a different types in single construct Elements can be any VHDL data type Elements are accessed through field name There are no predefined records in VHDL, but user-defined records can be very useful. A record holds several units within a group and the code gets easier to read. A record may contain an unlimited amount of elements.

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Record Type

A record element may be of any data type, including another record. The elements need not be of the same type. This construct allows users to create data structures which are useful for the system being represented.

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Record Type

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Syntax: type identifier is record element1 : type 1 element2 : type 2 . . . elementN : type N end record [ record-type-identifier ] ;

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Record Type:

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examples

type DATE is record


MONTH : STRING (0 to 20); DAY : INTEGER range 1 to 31; YEAR : INTEGER range 1800 to 2050;

end record DATE; -------------------------------------------type ADDRESS is record


STREET : STRING (0 to 50); PO_BOX : INTEGER range 0 to 100000; CITY : STRING (0 to 50); STATE : STRING (0 to 40); ZIP : INTEGER range 0 to 100000000;

-- to declare a date -- with a string for the month -- and an int for the day -- int for year -------------------------------------------- a record for an address -- line for street -- possible PO box -- line for city -- state -- keep zip code as int

end record ADDRESS;

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Record Type:

examples

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type EMPLOYEE is record


NAME : STRING (0 to 50); HIRE_DATE : DATE; HOME_ADR : ADDRESS; PHONE_NO : STRING(0 to 20); JOB_TITLE : STRING(0 to 20); JOB_CLASS : INTEGER range 1 to 1000;

-- declare an employee type -- space for name -- date when hired -- where -- can keep as string or int -- what job is -- comp has 1000 job classes

end record EMPLOYEE;

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Access Type

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Access are just like pointers in C programming language

Only variables can be an access type; that is, it is not permissible for a signal to be utilized as an access type.
If the access type is instantiated in such a way that it is not assigned an initial value, then the initial value is the literal, null.

The access type declaration begins with the keyword "type", followed by an identifier .
The identifier is then followed by the keywords "is access", which is then followed by a subtype indication .

The subtype indication may be as simple as a simple type, or it could be as complex as types can become, including a resolution function and/or index or range constraints.
After the subtype indication the statement is concluded with a semicolon.

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Access Type

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Syntax

type identifier is access subtype-indication ;


Example: --side module

type DATE is record MONTH : STRING (0 to 20); DAY : INTEGER range 1 to 31; YEAR : INTEGER range 1800 to 2050; end record DATE;
-- main module

type calendar is access DATE

-- calendar is a pointer to DATE in -- the side module

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Conclusion

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Arrays contain a number of elements of the same type or subtypes Arrays are Used to collect one or more elements of a similar type in a single construct

Records may contain a number of elements of different types or subtypes Record are used to collect one or more elements of a different types in a single construct
Access types are pointers Access is used for the implementing queues, fifos, etc.

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References
http://www.csee.umbc.edu/portal/help/VHDL/VH DL-Handbook.pdf
http://vhdl.renerta.com/mobile/index.html http://www.ece.unm.edu/faculty/pollard/types.htm l#AccessTypeDec

http://tams-www.informatik.unihamburg.de/vhdl/doc/cookbook/VHDLCookbook.pdf

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QUESTIONS

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THANK YOU

12/22/2012

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