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SimulatSimulation-Based Analysis of SEU Effects in SRAM-Based FPGAsion-Based Analysis of SEU Effects

SimulatSimulation-Based Analysis of SEU Effects in SRAM-Based FPGAsion-Based Analysis of SEU Effects

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Published by Muhammad Afzal
SRAM-based field programmable gate arrays
(FPGAs) are particularly sensitive to single event upsets (SEUs)
that, by changing the FPGA’s configuration memory, may affect
dramatically the functions implemented by the device. In this
paper we describe a new approach for predicting SEU effects in
circuits mapped on SRAM-based FPGAs that combines radiation
testing with simulation. The former is used to characterize (in
terms of device cross section) the technology on which the FPGA
device is based, no matter which circuit it implements. The latter
is used to predict the probability for a SEU to alter the expect
behavior of a given circuit. By combining the two figures, we
then compute the cross section of the circuit mapped on the
pre-characterized device. Experimental results are presented that
compare the approach we developed with a traditional one based
on radiation testing only, to measure the cross section of a circuit
mapped on an FPGA. The figures here reported confirm the
accuracy of our approach
SRAM-based field programmable gate arrays
(FPGAs) are particularly sensitive to single event upsets (SEUs)
that, by changing the FPGA’s configuration memory, may affect
dramatically the functions implemented by the device. In this
paper we describe a new approach for predicting SEU effects in
circuits mapped on SRAM-based FPGAs that combines radiation
testing with simulation. The former is used to characterize (in
terms of device cross section) the technology on which the FPGA
device is based, no matter which circuit it implements. The latter
is used to predict the probability for a SEU to alter the expect
behavior of a given circuit. By combining the two figures, we
then compute the cross section of the circuit mapped on the
pre-characterized device. Experimental results are presented that
compare the approach we developed with a traditional one based
on radiation testing only, to measure the cross section of a circuit
mapped on an FPGA. The figures here reported confirm the
accuracy of our approach

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Categories:Types, Research
Published by: Muhammad Afzal on Feb 23, 2013
Copyright:Attribution Non-commercial

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02/23/2013

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