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FPGA Design Flow-Altera

FPGA Design Flow-Altera

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Published by Chia-Sheng Wen

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Published by: Chia-Sheng Wen on Mar 06, 2009
Copyright:Attribution Non-commercial

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05/10/2014

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\u8a2d\u8a08
FPGA/HDL Design
FPGA/HDL
\u570b\u7acb\u9ad8\u96c4\u6d77\u6d0b\u79d1\u6280\u5927\u5b78\u5fae\u96fb\u5b50\u7cfb
\u6eab\u5bb6\u8056
February 2009
Textbooks/Lecture Notes
\u2022Textbooks
\u2013 S. Palnitkar, \u201cVerilog HDL, A Guide
to Digital Design and Synthesis\u201d,
2nd ed., , Sun Microsystems, Inc,
2003.
\u2022Additional Readings
\u2013 Wayne Wolf, \u201cFPGA-Based System
Design\u201d, 1st edition ., Prentice Hall.,
2004.
\u2022Lecture Notes
\u2013available at
http://vlsi.cse.nsysu.edu.tw/wen/fpga
References
\u2022\u6559\u80b2\u90e8P&L\u806f\u76df\u8ab2\u7a0b\u8b1b\u7fa9-FPGA\u7cfb\u7d71\u8a2d\u8a08\u5be6\u52d9
\u2022 Nazeih Botros, \u201cHDL Programming
Fundamentals,VHDL and Verilog\u201d, Da Vinci
Engineering Press, 2006.ISBN Number\uff1a1-
58450-855-8 ,\u4ee3\uf9e4\u5546\uff1a\u9ad8\u7acb\u66f8\u5c4006-3111301
\u2022Complete documents from IEEE standards

(available at
http://ieeexplore.ieee.org/xpl/standards.jsp) :
Verilog (IEEE std. 1364), VHDL (IEEE std. 1076)

\u2022Many other books on Verilog, VHDL, Verification,
Logic Synthesis, etc.

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