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A General Circuit Topology of Multilevel Inverter

A General Circuit Topology of Multilevel Inverter

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Published by Jimmy Fallony
A generalized circuit topology of multilevel voltage source inverter is proposed, which is based on a direct extension of the three-level inverter to higher level, and the circuit topologies up to five-level are presented. The proposed multilevel inverter can realize
any multilevel pulsewidth modulation(PWM) scheme which
leads to harmonic reduction and provides full utilization of semiconductor devices like GTOs especially in high power range where high voltage could be applied. Capacitor voltage balancing problem is pointed out and a circuit remedy for such a problem is also given.
A generalized circuit topology of multilevel voltage source inverter is proposed, which is based on a direct extension of the three-level inverter to higher level, and the circuit topologies up to five-level are presented. The proposed multilevel inverter can realize
any multilevel pulsewidth modulation(PWM) scheme which
leads to harmonic reduction and provides full utilization of semiconductor devices like GTOs especially in high power range where high voltage could be applied. Capacitor voltage balancing problem is pointed out and a circuit remedy for such a problem is also given.

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Categories:Types, Research
Published by: Jimmy Fallony on Mar 18, 2013
Copyright:Attribution Non-commercial

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07/27/2014

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