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Computerised Electronic Lock

Computerised Electronic Lock

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Published by Sagar Bhardwaj
majorv project ece
majorv project ece

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Published by: Sagar Bhardwaj on Mar 26, 2013
Copyright:Attribution Non-commercial


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electronics for you •
March 2010
 s u n i l  k u ma r
MuhaMMad ajMal P.
CoMPutersiedeleCtroniC loCk 
Fig. 1: Circuit diagram of computerised electronic lock Fig. 2: Control panel screen for switching the device either ‘on’ or ‘off’ 
lectronic lock systems are com-monly used in hotels, motels,cruise ships and ferries whererooms are rented to guests for a shortperiod of time and a high level of secu-rity is required. These offer several ad-vantages over mechanical locks such asbetter access control by providing mul-tiple access codes as well as dedicatedtime zones. In particular, electroniclock systems have revolutionised thehospitality industry by offering a safe
and efcient way of controlling the ac
-cess to the devices in hotel rooms.The electronic lock system is con-trolled by a computer system. Typi-cally, it consists of a key generatingstation, which is located at the check-incounter or front desk of the hotel, andan electronic lock, which is mountedat the door of a room and providesaccess to the room. Upon checking inat the front desk of the hotel and beingassigned a room, a customer is giventhe electronic key corresponding tothe electronic lock securing accessto his room. The electronic lock mayperform processing upon user inputbefore causing the locking mecha-nism to activate or deactivate. Suchprocessing allows more sophisticatedfunctionality than the aforementionedmechanical locks.Electronic locks provide for in-creased secu-rity as the lockcan be repro-grammed toreject the keysthat it wouldpreviouslyaccept. Also,these don’t usea mechanicalkey that canbe easily du-plicated.
The parallelport or lineprinter termi-nal (LPT) is a25-pin, D-typeconnector(DB25) foundat the backof your PC.It comprisesthree differentports, namely,data port, con-trol port andstatus port. In
March 2010
electronics for you
order to access any port, you shouldhave its port address. The addresses ofdata port, status port and control portare ‘0×378’, ‘0×378+1’ and ‘0×378+2,’respectively. Here we have used twodata lines along with signal groundfor controlling the direction of motorrotation.
Cc cp
Fig. 1 shows the circuit of the compu-terised electronic lock. It comprisesBCD-to-decimal decoder CD4028,decade counter CD4017, AND gate
CD4081, ip-op CD4013 and a few
discrete components.BCD-to-decimal decoder CD4028(IC1) consists of four inputs, decodinglogic gates and ten output buffers. ABCD code applied to its input pins (D0through D4) results in a high level atthe selected 1-of-10 decimal decodedoutputs. Pins D0 through D4 of CD4028are pulled low through resistors R1through R4 and receive inputs from theparallel port. Data pins D0 through D2of the parallel port control the lockingand unlocking processes.The CD4017 is 5-stage divide-by-10 counter with ten decoded outputsand a carry-out bit. These counters arecleared to their zero count by a high ontheir reset pin 15, which is provided byQ1 output of decoder CD4028.Schmitt trigger action in the clockinput circuit provides pulse a shapingthat allows unlimited clock input pulserise and fall times. Q2 and Q3 outputsof CD4028 provide positive-edge clockpulse to IC3 and IC2, respectively.
Both of these counters advance on thepositive edge of the clock signal whenstrobe pin 13 is in the logical ‘0’ state.Q4 and Q5 outputs of CD4028 controlthe lock ‘on’ and ‘off’ function with thehelp of AND gate CD4081.Q0 through Q9 outputs of decadecounter CD4017 are used for selec-tion of the device with the help of DIPswitches DIP-SW1 and DIP-SW2. Q0through Q9 outputs of IC2 are usedfor device selection in decade from 10through 90 (10, 20, 30, ..., 70, 80, 90),respectively, with the help of DIP-SW1.Q0 through Q9 outputs of IC3 are usedfor device selection from 0 to 9, respec-tively, with the help of DIP-SW2.Lock circuit (shown inside the
dotted line) is built around ip-op
CD4013, two AND gates, transistorand relay RL1. If AND gate N3 inputsVx and ON are high, its output sets
ip-op CD4013. The high output ofthe ip-op drives the transistor into
saturation and relay RL1 energises toturn the device ‘on.’ If AND gate N4inputs Vx and OFF are high, its output
resets ip-op CD4013. As a result,
Parts List
IC1 - CD4028 BCD-to-decimaldecoderIC2, IC3 - CD4017 decade counterIC4, IC6 - CD4081 AND gateIC5 - 7806, 6V regulator
IC7 - CD4013 ip-op
T1 - BC547 npn transistor
D1-D3 - 1N4007 rectier diode
Resistors (all ¼-watt, ±5% carbon unlessstated otherwise):
R1-R5, R8, R9 - 10-kilo-ohmR6, R7 - 47-kilo-ohmR10 - 1-kilo-ohm
C1 - 1000µF, 25V electrolyticC2 - 0.1µF ceramic disk
X1 - 230V primary to 9V-0-9V,500mA secondarytransformerRL1 - 6V, 1C/O relayDIP-SW1,DIP-SW2 - 8-way DIP switch
Fig. 3: Actual-size, single-side PCB for the computersied electronic lock Fig. 4: Component layout for the PCB 

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