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Programmable System Design Testing and Design for Reliability of Digital Systems
Interdisciplinary Project
Fault Tolerant Processor
using Hybrid Hardware Redundancy 
Matteo AinardiVittorio GiovaraAlberto GrandFabio MargagliaMarch 11, 2009
 
Contents
1 Introduction32 General Architecture5
2.1 Finite State Machine. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82.2
the breaker
module. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3 Custom Development Tools12
3.1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123.2 Memory Generation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133.3 Structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
A Memory content15B Test Program16C HEX generator17D Compiler patch19
1
 
List of Figures
2.1 System Architecture Model. . . . . . . . . . . . . . . . . . . . . . . . . . . 62.2 Main Finite State Machine Scheme. . . . . . . . . . . . . . . . . . . . . . . 92.3 Finite State Machine Scheme for the process
the breaker
. . . . . . . . . . 112
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