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Vedic Computer Proof - Vedic Algorithms

Vedic Computer Proof - Vedic Algorithms

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Published by CXXXVII
The Implementation of Vedic Algorithms in Digital Signal Processing. A very fast Vedic Computer.
The Implementation of Vedic Algorithms in Digital Signal Processing. A very fast Vedic Computer.

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Published by: CXXXVII on Apr 15, 2013
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153
©
2004 UICEE Global J. of Engng. Educ., Vol.8, No.2Published in Australia
INTRODUCTION
Vedic mathematics
is the name given to the ancientsystem of mathematics, or, to be precise, a uniquetechnique of calculations based on simple rules andprinciples with which any mathematical problem canbe solved – be it arithmetic, algebra, geometry ortrigonometry. The system is based on 16 Vedic
sutras
or aphorisms, which are actually word formulaedescribing natural ways of solving a whole range of mathematical problems. Vedic mathematics wasrediscovered from the ancient Indian scripturesbetween 1911 and 1918 by Sri Bharati Krishna Tirthaji(1884-1960), a scholar of Sanskrit, mathematics,
The Implementation of Vedic Algorithms in DigitalSignal Processing
*
Purushottam D. ChidgupkarMangesh T. Karad
 MIT Women Engineering College, Maharashtra Academy of Engineering and Educational ResearchS. No. 124, MIT Eng. College Campus, Ex-Serviceman Colony, Paud Road, Pune - 411038, India
Digital signal processing (DSP) is the technology that is omnipresent in almost every engineeringdiscipline. It is also the fastest growing technology this century and, therefore, it poses tremendouschallenges to the engineering community. Faster additions and multiplications are of extremeimportance in DSP for convolution, discrete Fourier transforms, digital filters, etc. The corecomputing process is always a multiplication routine; therefore, DSP engineers are constantlylooking for new algorithms and hardware to implement them. Vedic mathematics is the name givento the ancient system of mathematics, which was rediscovered, from the Vedas between 1911 and1918 by Sri Bharati Krishna Tirthaji. The whole of Vedic mathematics is based on 16
sutras
(wordformulae) and manifests a unified structure of mathematics. As such, the methods are complementary,direct and easy. The authors highlight the use of multiplication process based on Vedic algorithmsand its implementations on 8085 and 8086 microprocessors, resulting in appreciable savings in processingtime. The exploration of Vedic algorithms in the DSP domain may prove to be extremely advantageous.Engineering institutions now seek to incorporate research-based studies in Vedic mathematics forits applications in various engineering processes. Further research prospects may include the designand development of a Vedic DSP chip using VLSI technology.
*A revised and expanded version of a keynote addresspaper presented at the
4
th
Global Congress on Engineer-ing Education
, held in Bangkok, Thailand, from 5 to 9 July2004. This paper was awarded the UICEE diamond award(joint first grade with one other paper) by popular vote of Conference participants for the most significant contribu-tion to the field of engineering education.
history and philosophy [1]. He studied these ancienttexts for years and, after careful investigation, wasable to reconstruct a series of mathematical formulaecalled
sutras
.Bharati Krishna Tirthaji, who was also the formerShankaracharya (major religious leader) of Puri,India, delved into the ancient Vedic texts and estab-lished the techniques of this system in his pioneeringwork,
Vedic Mathematics
(1965), which is consideredthe starting point for all work on Vedic mathematics.Vedic mathematics was immediately hailed as a newalternative system of mathematics when a copy of the book reached London in the late 1960s.Some British mathematicians, including KennethWilliams, Andrew Nicholas and Jeremy Pickles, took interest in this new system. They extended theintroductory material of Bharati Krishna’s book, anddelivered lectures on it in London. In 1981, this wascollated into a book entitled
 Introductory Lectureson Vedic Mathematics
[2]. A few successive trips toIndia by Andrew Nicholas between 1981 and 1987
 
P.D. Chidgupkar & M.T. Karad 
154renewed interest in Vedic mathematics, and scholarsand teachers in India started taking it seriously.According to Mahesh Yogi,
The
sutras
of Vedic Mathematics are the software for the cosmiccomputer that runs this universe
. A great deal of research is also being carried out on how to developmore powerful and easy applications of the Vedic
sutras
in geometry, calculus and computing.Conventional mathematics is an integral part of engineering education since most engineering systemdesigns are based on various mathematical approaches.All the leading manufacturers of microprocessors havedeveloped their architectures to be suitable for con-ventional binary arithmetic methods. The need forfaster processing speed is continuously driving majorimprovements in processor technologies, as well asthe search for new algorithms. The Vedic mathemat-ics approach is totally different and considered veryclose to the way a human mind works. A large amountof work has so far been done in understandingvarious methodologies (sutras). However, hardly anymeaningful applications of Vedic algorithms have beenthought of. In this article, the authors show how asuccessful attempt has been made to present two-and three-digit
multiplication
operations and the im-plementation of these using both conventional, as wellas Vedic, mathematical methods in 8085/8086 micro-processor assembling language. The authors alsohighlight a comparative study of both approaches interms of processing times (
states).
THE VEDIC MULTIPLICATION METHOD
The multiplication of two- or three-digit numbersutilising conventional mathematical methods (succes-sive additions when used on computers) needs noexplanation.Alternatively, the Vedic method is illustrated in theexample below. The digits on the two sides of line aremultiplied and the result is added in the previous
carry
.When more than one line is in the step, all the resultsare added with the previous carry and the processis thus continued. Initially, the previous carry is equalto zero. A unit place digit of addition result is one of the digits in the answer; this is derived from full multi-plication, while the remaining digits act as a carry.If the numbers of the digits are not same in themultiplier and multiplicand, then the bigger numberhas to be determined. The number of digits then needsto be counted. The smaller number should bepre-pended with 0s so that both numbers will be of the same digits [3].The two digit multiplication example of 54 X 48 isgiven below.Step 1:Step 2:Step 3:Three-digit multiplication (eg 532 X 438 ) is listedbelow.Step 1:Step 2:Answer:
 
The Implementation of Vedic Algorithms...
155Step 3:Step 4:Step 5:Answer: 532 * 438 = 233,016.For 3 digit numbers, the line diagram is representedas follows:The line diagram for four digits is given below:The flowchart for implementing Vedic multiplica-tion in C language is listed in Figures 1 and 2.
COMPARATIVE STUDY OF PROCESSINGTIMES OF CONVENTIONAL AND VEDICMULTIPLICATIONS FOR 8085/8086MICROPROCESSORS
By using the above-mentioned Vedic methods fortwo- and three-digit multiplications, assembly programson 8085/8086 microprocessors were written, alongwith the number of clock states (
states) per instruc-tion, in order to evaluate the total processing timefor each of the methods [4].Similar exercises have been completed for two-and three-digit multiplications utilising conventionalmathematics methods. Both types of programs weresuccessfully run to obtain the correct results (theassembly program listings could not be reproduced inthis article due to paucity of space).A 3 MHz clock used in 8085 Microprocessor givesone
state equal to 0.33 microseconds. Therefore,the total processing time is the product of total numberof 
states and the time period of one
state (ie 0.33microseconds) [5]. A comparison of the processingtimes for Vedic and conventional mathematical meth-ods in the case of two- and three-digit multiplicationsreveals the details listed below.Two-digit multiplication yields the results shown inTable 1. As evidenced from Table 1, a time saving of approximately 59% can be achieved using the Vedicmethod.Three-digit multiplication gives the results shownin Table 2.In the case of three-digit multiplication, approxi-mately 42% of the processing time is saved. Similarresults can be obtained on other processors as well.The above results are extremely encouraging sofar as applications in digital signal processing (DSP)are concerned. Most of the important DSP algorithms,such as convolution, discrete Fourier transforms, fastFourier transforms, digital filters, etc, incorporate
multiply-accumulate
computations [6]. Since the
multiplication
time is generally far greater than the
addition
time, the total processing time for any DSPalgorithm primarily depends upon the number of multipli-cations. Therefore, the above-mentioned tabulated5)6)7)
1)2)3)4)5)2)1)3)4)

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