Welcome to Scribd, the world's digital library. Read, publish, and share books and documents. See more
Download
Standard view
Full view
of .
Look up keyword
Like this
1Activity
0 of .
Results for:
No results containing your search query
P. 1
efficient memory repair using cache based redundancy

efficient memory repair using cache based redundancy

Ratings: (0)|Views: 45|Likes:
Published by Hemalatha Mardi
In modern processes, conventional defect density and
variability related yield losses are a major concern for the aggressive
memory designs in integrated circuits. Synergistic action for
memory repair at the circuit and architectural level is essential to
maintain the yields and profitability of past technology nodes. In
this paper, we propose a scalable memory repair architecture that
utilizes a set of direct-mapped cache banks to replace faulty words.
Statistical and mathematical probability analysis shows that the
proposed scheme achieves high repairability levels with low area
and static power dissipation overheads, the latter being a dominant
issue in nanometer technologies. It is therefore a suitable solution
along with other mature memory repair techniques, to enhance the
overall repairability features and guarantee the correct and reliable
operation of embedded memories in nanometer technologies.
In modern processes, conventional defect density and
variability related yield losses are a major concern for the aggressive
memory designs in integrated circuits. Synergistic action for
memory repair at the circuit and architectural level is essential to
maintain the yields and profitability of past technology nodes. In
this paper, we propose a scalable memory repair architecture that
utilizes a set of direct-mapped cache banks to replace faulty words.
Statistical and mathematical probability analysis shows that the
proposed scheme achieves high repairability levels with low area
and static power dissipation overheads, the latter being a dominant
issue in nanometer technologies. It is therefore a suitable solution
along with other mature memory repair techniques, to enhance the
overall repairability features and guarantee the correct and reliable
operation of embedded memories in nanometer technologies.

More info:

Published by: Hemalatha Mardi on Jul 15, 2013
Copyright:Attribution Non-commercial

Availability:

Read on Scribd mobile: iPhone, iPad and Android.
download as PDF, TXT or read online from Scribd
See more
See less

12/06/2013

pdf

text

original

You're Reading a Free Preview
Pages 3 to 21 are not shown in this preview.

You're Reading a Free Preview

Download
scribd
/*********** DO NOT ALTER ANYTHING BELOW THIS LINE ! ************/ var s_code=s.t();if(s_code)document.write(s_code)//-->