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Course Plan Esd

Course Plan Esd

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Published by: saravanaeee2004 on Aug 03, 2013
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AKCE/PM/C-V/PRN/7.5.1/23/F-05
ARULMIGU KALASALINGAM COLLEGE OF ENGINEERINGANAND NAGAR, KRISHNANKOIL - 626 190.DEPARTMENT OF INSTRUMENTATION AND CONTROL ENGINEERINGCOURSE PLAN
SUBJECT NAME : EMBEDDED SYSTEM DESIGN / EC 1032STAFF NAME : M.P.Rajasekaran
III Year / VIII SEM1.Pre-requisite
:a.Fundamentals of microprocessor and DSP processors.
2.Objectives :
This course is designed with two complementary goals:1.To understand the scientific principles and concepts behind embeddedsystems, and2.To obtain hands-on experience in programming embedded systems..
3.Learning outcome and end use:
Understand, and be able to discuss and communicate intelligently abouta.Embedded processor architecture and programming b.I/O and device driver interfaces to embedded processors with networks,multimedia cards and disk drivesc.OS primitives for concurrency, timeouts, scheduling, communication andsynchronization
4.REFERENCE BOOK :
1.Rajkamal, ‘Embedded System Architecture, Programming, Design’, TataMcGraw Hill, 2003.2.Daniel W. Lewis ‘Fundamentals of Embedded Software’, Prentice Hall of India, 2004.3.David E. Simon, ‘An Embedded Software Primer’, Pearson Education, 2004.4.Frank Vahid, ‘Embedded System Design A Unified hardware & SoftwareIntroduction’, John Wiley, 2002.5.Sriram V. Iyer, Pankaj Gupte, ‘Embedded Real Time Systems Programming’,Tata McGraw Hill, 2004.
 
5.Web resources :
www.DSPguide.com- 24 units covering the syllabus.
www.artist-
embedded
.org/docs/Events/2003/ICD/Education/Moon%20Kim.pdf 
csis.bits-pilani.ac.in/faculty/tsbs/Main/Courses/Hsc_08/handouts/eeeg626_08.pdf 
www.science-engineering.net/embedded-systems.htm
6.Lesson Plan
Sl.NoTopicsBookPeriodsCumulativeHours
UNIT -IINTRODUCTION TO EMBEDDED SYSTEM
1.
Introduction to functional building blocks of embedded systems
R1332.Re
 
gister, memory devices253.Ports, timer274.Interrupt controllers using circuit blocdiagram representation for each category.310
UNIT - IIPROCESSOR AND MEMORY ORGANIZATION
6.Structural units in a processor;R11117.Selection of processor & memory devices;shared memory;2138.DMA1149.Interfacing processor, memory and I/Ounits;21610.Memory management Cache mappingtechniques, dynamic allocation -Fragmentation.420
UNIT- IIIDEVICES & BUSES FOR DEVICES NETWORK 
14.I/O devices; timer & counting devices;serial communication using I
2
C, CAN,USB buses;R132315.Parallel communication using ISA, PCI,PCI/X buses, arm bus;32616.Interfacing with devices/ports, devicedrivers in a system – Serial port & parallel port.430
UNITY - IVI/O PROGRAMMING SCHEDULE MECHANISM
17.Intel I/O instruction Transfer rate,latency; interrupt driven I/O -R1434

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