Dong Ho Thoi Gian Thuc DS1037

n 1: ti: Thit k ng h thi gian thc
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Trang 1
Ni dung thit k:
Chng I : Gii Thiu Chung.

Chng II : Cc linh kin chnh c s dng trong mch.
Chng III:Cc khi mch cn s dng v s mch hon chnh.
Chng IV: Chng trnh phn mm.
Chng V : Tng kt.
Li ni u
Ngy nay nhn loi ang tri qua nhng s pht trin vt v mi mt.Trong in
t, t ng ho ng mt vai tr khng nh. in t gp phn vo qu trnh t ng ho
mi th gip con ngi hin i ho cuc sng.
Vn dng nhng kin thc c hc trong qu trnh hc tp trng nhm em thc
hin n I ny. n ny c p dng ch yu da vo vi iu khin. M thc t l
IC ATMEGA16, nhm mc ch gip em hiu mt cch tng tn hn v nhng g v vi
iu khin, cch c, vit va nhn bit v cc chn IC m em c hc t thy c
trong trng, tm hiu v nghin cu qua sch cng nh cch thc vn dng n trong
thc t.
Trong thc t, cc ng dng ca vi iu khin rt a dng v phong ph.T nhng ng
dng n gin ch c vi thit b ngoi vi cho n nhng h thng iu khin phc tp
.Tuy nhin do pham vi trnh ca em cn hn ch, nn vic nghin cu v tm hiu v
vi iu khin cn nhiu iu cha bit. Trong bi vit ca em, em xin gii thiu ng dng
IC ATMEGA16 hin th b m GI-PHT-GIY trn 6 Led 7thanh.
Tuy nhin trong qu trnh vit do trnh hiu bit ca chng em cn hn ch, nn cn
xy ra nhiu sai st mong thy v cc bn gp b sung chng em c hiu bit hn
trong qu trnh hc tp tip theo.
Nhm chng em xin chn thnh cm n!
H Ni, Ngy 17 thng 11 nm 2009.
Trang 2
Mc Lc:
mc
Trang
Ni dung thit k
Li ni u
Mc lc
Chng 1: Gii Thiu Chung
1. S lc
2. S khi
2
2
3
4
4
4
Chng 2: Cc linh kin chnh c s dng trong mch

1. Vi iu khin ATMEGA16:
a.
Gii thiu chung.
b.
S khi.
c.
S chn.
d.
ngha ca cc chn
2. IC to ngun n p chun 7805.
3. IC to thi gian thc DS1307.
4. LED 7thanh.
5
5
5
9
10
11
11
12
Chng 3:Cc khi mch cn s dng v s mch hon

chnh
1,Khi to ngun
2,Khi Reset
3,Khi iu khin
4,Khi to xung dao ng
5,Khi hin th
6,Khi to thi gian thc
Chng 4: S mch hon chnh.
S mch nguyn l
S mch in
20
Chng 5: Chng trnh phn mm

S thut ton
Code chng trnh cho AT16
20
20
21
21
22
23
24
25
26
27
28
Trang 3
Chng I : Gii Thiu Chung

1) S Lc:
Trong cng ngh in t vi x l, vi iu khin l mt thnh phn quan trng khng
th thiu n mang nhiu tnh u vit: c th thay th mt mch in phc tp bng mt vi
mch nh gn vi chi ph thp hn, nhng ng dng li a dng v linh hot hn, tit
kim nng lng hn, tc x l nhanh hn,
hc tp tt v hiu su v mn hc vi x l ngoi nhng kin thc trn sch v cn
c nhng ng dng vo thc t. Trn c s chng em tm hiu v thit k sn phm l
mch NG H THI GIAN THC dng vi iu khin AVR ca ATMEL. C kh
nng iu chnh v thay i c thi gian. So vi nhng mch ng h dng h vi iu
khin 8051 v PIC th AVR c u im hn l ngn ng lp trnh c vit bng C th
chng trnh s ngn gn hn, so vi 8051 th tc x l tn hiu nhanh hn.
2) S khi:
Khi ngun
Khi hin th
To xung dao
ng
Vi iu Khin
Reset
ATmega16
iu khin
To thi
gian thc
Chng II: Cc linh kin chnh c s dng

trong mch.
1.
Vi iu khin Atmega 16.

a) Gii thiu chung
ATmega16 l vi iu khin 8 bit da trn kin trc RISC. Vi kh nng thc hin
mi lnh trong vng mt chu k xung clock, ATmega16 c th t c tc 1MIPS
trn mi MHz (1 triu lnh/s/MHz).
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ATmega16 c cc c im sau: 16KB b nh Flash vi kh nng c trong khi ghi, 512

byte b nh EEPROM, 1KB b nh SRAM, 32 thanh ghi chc nng chung, 32 ng
vo ra chung, 3 b nh thi/b m, ngt ni v ngt ngoi, USART, giao tip ni tip 2
dy, 8 knh ADC 10 bit,....ATmega 16 h tr y cc chng trnh v cng c pht
trin h thng nh: trnh dch C, macro assemblers, chng trnh m phng/sa li, kit
th nghim,...
v Cu trc nhn AVR
CPU ca AVR c chc nng bo m s hot ng chnh xc ca cc chng trnh. Do
n phi c kh nng truy cp b nh, thc hin cc qu trnh tnh ton, iu khin cc
thit b ngoi vi v qun l ngt.
Cu trc tng qut
AVR s dng cu trc Harvard, tch ring b nh v cc bus cho chng trnh v
d liu. Cc lnh c thc hin ch trong mt chu k xung clock. B nh chng
trnh c lu trong b nh Flash.
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ALU
ALU lm vic trc tip vi cc thanh ghi chc nng chung. Cc php ton c
thc hin trong mt chu k xung clock. Hot ng ca ALU c chia lm 3 loi:
i s, logic v theo bit.
Thanh ghi trng thi
y l thanh ghi trng thi c 8 bit lu tr trng thi ca ALU sau cc php tnh s
hc v logic.
C: Carry Flag ;c nh (Nu php ton c nh c s c thit lp).

Z: Zero Flag ;C zero (Nu kt qu php ton bng 0).
N: Negative Flag (Nu kt qu ca php ton l m).
V: Twos complement overflow indicator (C ny c thit lp khi trn s b 2)V,
For signed tests (S=N XOR V) S: N.
H: Half Carry Flag (c s dng trong mt s ton hng s c ch r sau)
T: Transfer bit used by BLD and BST instructions(c s dng lm ni chung
gian trong cc lnh BLD,BST).
I: Global Interrupt Enable/Disable Flag (y l bit cho php ton cc ngt. Nu bit
ny trng thi logic 0 th khng c mt ngt no c phc v.)
Cc thanh ghi chc nng chung
Trang 6
Con tr ngn xp (SP)

L mt thanh ghi 16 bit nhng cng c th c xem nh hai thanh ghi chc nng
c bit 8 bit. C a ch trong cc thanh ghi chc nng c bit l $3E (Trong b
nh RAM l $5E). C nhim v tr ti vng nh trong RAM cha ngn xp.
Khi chng trnh phc vu ngt hoc chng trnh con th con tr PC c lu vo
ngn xp trong khi con tr ngn xp gim hai v tr. V con tr ngn xp s gim 1
khi thc hin lnh push. Ngc li khi thc hin lnh POP th con tr ngn xp s
tng 1 v khi thc hin lnh RET hoc RETI th con tr ngn xp s tng 2. Nh
vy con tr ngn xp cn c chng trnh t trc gi tr khi to ngn xp
trc khi mt chng trnh con c gi hoc cc ngt c cho php phc v. V
gi tr ngn xp t nht cng phi ln hn hoc bng 60H (0x60) v 5FH tr li l
vng cc thanh ghi.
Trang 7
Qun l ngt
Ngt l mt c ch cho php thit b ngoi vi bo cho CPU bit v tnh

trng sn sxng cho i d liu ca mnh.V d:Khi b truyn nhn UART
nhn c mt byte n s bo cho CPU bit thng qua c RXC,hc khi n
truyn c mt byte th c TX c thit lpKhi c tn hiu bo ngt
CPU s tm dng cng vic ng thc hin li v lu v tr ang thc hin
chng trnh (con tr PC) vo ngn xp sau tr ti vector phuc v ngt v
thc hin chng trnh phc v ngt ch ti khi gp lnh RETI (return
from interrup) th CPU li ly PC t ngn xp ra v tip tc thc hin chng
trnh m trc khi c ngt n ang thc hin. Trong trng hp m c nhiu
ngt yu cu cng mt lc th CPU s lu cc c bo ngt li v thc hin ln
lt cc ngt theo mc u tin .Trong khi ang thc hin ngt m xut hin
ngt mi th s xy ra hai trng hp. Trng hp ngt ny c mc u tin cao
hn th n s c phc v. Cn n m c mc u tin thp hn th n s b b
qua.B nh ngn xp l vng bt k trong SRAM t a ch 0x60 tr ln.
truy nhp vo SRAM thng thng th ta dng con tr X,Y,Z v truy nhp
vo SRAM theo kiu ngn xp th ta dng con tr SP. Con tr ny l mt thanh
ghi 16 bit v c truy nhp nh hai thanh ghi 8 bit chung c a ch
:SPL :0x3D/0x5D(IO/SRAM) v SPH:0x3E/0x5E.Khi chng trnh phc vu
ngt hoc chng trnh con th con tr PC c lu vo ngn xp trong khi con tr
ngn xp gim hai v tr.V con tr ngn xp s gim 1 khi thc hin lnh push.
Ngc li khi thc hin lnh POP th con tr ngn xp s tng 1 v khi thc
hin lnh RET hoc RETI th con tr ngn xp s tng 2. Nh vy con tr
ngn xp cn c chng trnh t trc gi tr khi to ngn xp trc khi mt
chng trnh con c gi hoc cc ngt c cho php phc v. V gi tr
ngn xp t nht cng phi ln hn 60H (0x60) v 5FH tr li l vng cc
thanh ghi.
b) S khi:
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c) S chn:
Trang 9
c) ngha cc chn:
ChnVcc: Chn s 10 l VCC cp in p ngun cho Vi iu khin. Ngun
in cp l +5V0.5.
Chn GND:Chn s11 v chn s 31 ni GND(hay ni Mass). Khi thit k
cn s dng mt mch n p bo v cho Vi iu khin, cch n gin l s
dng IC n p 7805.
Port A (PA): Port A gm 8 chn (t chn 33 n 40) c chc nng: u vo
cho chuyn i ADC
Port B (PB): Port PB gm 8 chn (t chn 1 n chn 8), ngoi c chc nng
lm cc ng xut/nhp th cn c nhiu chc nng ph khc.
Port C (PC): Port C gm 8 chn (t chn 22 n chn 29) : Nu giao tip
JTAG c kch hot in tr trn cc PC5(TDI), PC3 (TMS) ,PC2 (TCK) s
c kch hot ngay c khi khi ng li (reset)
Trang 10
Port D (PD): Port D gm 8 chn (t chn 14 n 21):chc nng xut nhp

Chn RESET(RST): Ng vo RST chn 9 l ng vo Reset dng thit
lp trng thi ban u cho vi iu khin. H thng s c thit lp li cc gi
tr ban u nu ng ny mc 1 ti thiu 2 chu k my.
Chn XTAL1 v XTAL2 : Hai chn ny c v tr chn l 12 v 13 c s
dng nhn ngun xung clock t bn ngoi hot ng, thng c ghp
ni vi thch anh v cc t to ngun xung clock n nh.
Chn AVCC : Ngun cp cho cng A v b chuyn i ADC , chn ny nn
c ni vi ngun cp VCC bn ngoi , ngay c khi b chuyn i ADC
khng c s dng. Nu b chuyn i ADC khng c s dng , chn
AVCC nn c ni vi ngun qua b lc.
Chn AREF : AREF l chn chun analog cho b chuyn i ADC.
2.
IC to n p 7805:( IC n p 5v).
Vi nhng mch in khng i hi n nh ca in p qu cao, s dng IC n
p thng c ngi thit k s dng v mch in kh n gin. Cc loi n p
thng c s dng l IC 78xx, vi xx l in p cn n p. V d 7805 n p 5V,
7812 n p 12V. Vic dng cc loi IC n p 78xx tng t nhau, di y l minh
ha cho IC n p 7805:
S pha di IC 7805 c 3 chn:

* Chn s 1 l chn IN.
* Chn s 2 l chn GND.
* Chn s 3 l chn OUT.
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Ng ra OUT lun n nh 5V d in p t ngun cung cp thay i. Mch ny dng

bo v nhng mch in ch hot ng in p 5V (cc loi IC thng hot ng
in p ny). Nu ngun in c s c t ngt: in p tng cao th mch in vn hot
ng n nh nh c IC 7805 vn gi c in p ng ra OUT 5V khng i.
Mch trn ly ngun mt chiu t mt my bin p vi in p t 7V n 9V a
vo ng IN. Khi kt ni mch in, do nhiu nguyn nhn, ngi dng d nhm ln cc
tnh ca ngun cung cp khi u ni vo mch, trong trng hp ny rt d nh hng
n cc linh kin trn board mch. V l do mt diode cu c lp thm vo mch,
diode cu m bo cc tnh ca ngun cp cho mch theo mt chiu duy nht, v ngui
dng cng khng cn quan tm n cc tnh ca ngun khi ni vo ng IN na.
3.
IC to thi gian DS1307:

a) Gii thiu chung v DS1307:
IC thi gian thc l h vi iu khin ca hng dalat. DS1307 c mt s c trng c

bn sau:
- DS1307 l IC thi gian thc vi ngun cung cp nh dng cp nht thi gian v
ngy thng
- SRAM :56bytes
- a ch v d liu c truyn ni tip qua 2 ng bus 2 chiu
- DS1307 c mt mch cm bin in p dng d cc in p li v t ng ng
ngt vi ngun pin cung cp 3V:
+ DS1307 c 7 byte d liu nm t a ch 0x00 ti 0x06, 1 byte iu khin, v
56 byte lu tr ( dnh cho ngi s dng ).
+ Khi x l d liu t DS1307, h t chuyn cho ta v dng s BCD, v d
nh ta c c d liu t a ch 0x04 (tong ng vi Day- ngy trong thng) v ti
0x05 (thng) l 0x15, 0x11.
+ Lu n vai tr ca chn SQW/OUT. y l chn cho xung ra ca DS1307
c 4 ch 1Hz, 4.096HZ, 8.192Hz, 32.768Hz... cc ch ny uc quy nh bi cc
bt ca thanh ghi Control Register (a ch 0x07 ).
+ a ch ca DS1307l 0xD0.
- C ch hot ng : DS1307 hot ng vi vai tr slave trn ng bus ni
tip.Vic truy cp c thi hnh vi ch th start v mt m thit b nht nh c cung
cp bi a ch cc thanh ghi. Tip theo cc thanh ghi s c truy cp lin tc n
khi ch th stop c thc thi.
b) C ch hot ng v chc nng ca DS1307:
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Vcc: ni vi ngun
X1,X2: ni vi thch anh 32,768 kHz
Vbat: u vo pin 3V
GND: t
SDA: chui data
SCL: dy xung clock
SQW/OUT: xung vung/u ra driver
DS1307 l mt IC thi gian thc vi ngun cung cp nh, dng cp nht thi gian
v ngy thng vi 56 bytes SRAM. a ch v d liu c truyn ni tip qua 2 ng
bus 2 chiu. N cung cp thng tin v gi,pht,giy ,th,ngy ,thng, nm.Ngy cui
thng s t ng c iu chnh vi cc thng nh hn 31 ngy,bao gm c vic t
ng nhy nm. ng h c th hot ng dng 24h hoc 12h vi ch th AM/PM.
DS1307 c mt mch cm bin in p dng d cc in p li v t ng ng ngt
vi ngun pin cung cp.
DS 1307 hot ng vi vai tr slave trn ng bus ni tip. Vic truy cp c thi
hnh vi ch th START v mt m thit b nht nh c cung cp bi a ch cc thanh
ghi. Tip theo cc thanh ghi s c truy cp lin tc n khi ch th STOP c thc
thi.
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S khi ca DS1307:
*M t hot ng ca cc chn:
Vcc,GND: ngun mt chiu c cung cp ti cc chn ny. Vcc l u vo 5V.
Khi 5V c cung cp th thit b c th truy cp hon chnh v d liu c th c
v vit. Khi pin 3 V c ni ti thit b ny v Vcc nh hn 1,25Vbat th qu trnh
c v vit khng c thc thi,tuy nhin chc nng timekeeping khng b nh
hng bi in p vo thp. Khi Vcc nh hn Vbat th RAM v timekeeper s c
ngt ti ngun cung cp trong (thng l ngun 1 chiu 3V)
Vbat: u vo pin cho bt k mt chun pin 3V . in p pin phi c gi trong
khong t 2,5 n 3V m bo cho s hot ng ca thit b.
SCL(serial clock input): SCL c s dng ng b s chuyn d liu trn
ng dy ni tip.
SDA(serial data input/out): l chn vo ra cho 2 ng dy ni tip. Chn SDA
thit k theo kiu cc mng h , i hi phi c mt in tr ko trong khi hot ng.
SQW/OUT(square wave/output driver)- khi c kch hot th bit SQWE c
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thit lp 1 chn SQW/OUT pht i 1 trong 4 tn s (1Hz,4kHz,8kHz,32kHz). Chn

ny cng c thit k theo kiu cc mng h v vy n cng cn c mt in tr ko
trong. Chn nys hot ng khi c Vcc v Vbat c cp.
X1,X2: c ni vi mt thch anh tn s 32,768kHz. L mt mch to dao ng
ngoi, hot ng n nh th phi ni thm 2 t 33pF .
Cng c DS1307 vi b to dao ng trong tn s 32,768kHz, vi cu hnh ny th
chn X1 s c ni vo tn hiu dao ng trong cn chn X2 th h.
c) S a ch RAM v RTC:
Thng tin v thi gian v ngy thng c ly ra bng cch c cc byte thanh ghi
thch hp. thi gian v ngy thng c thit lp cng thng qua cc byte thanh ghi ny
bng cch vit vo nhng gi tr thch hp. ni dung ca cc thanh ghi di dng m
BCD(binary coded decreaseimal). Bit 7 ca thanh ghi seconds l bit clock halt(CH),khi
bit ny c thit lp 1 th dao ng disable, khi n c xo v 0 th dao ng c
enable.
Ch : enable dao ng trong sut qu trnh cu hnh thit lp (CH=0).Thanh ghi
thi gian thc c m t nh sau:
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DS1307 c th chy ch 24h cng nh 12h. Bit th 6 ca thanh ghi hours l bit
chn ch 24h hoc 12h. khi bit ny mc cao th ch 12h c chn. ch 12h
th bit 5 l bit AM/PM vi mc cao l l PM. ch 24h th bit 5 l bit ch 20h(t 20h
n
23h).
Trong qu trnh truy cp d liu, khi ch th START c thc thi th dng thi gian
c truyn ti mt thanh ghi th 2,thng tin thi gian s c c t thanh ghi th cp
ny,trong khi ng h vn tip tc chy. Trong DS1307 c mt thanh ghi iu khin
iu khin hot ng ca chn SQW/OUT :
OUT(output control): bit ny iu khin mc ra ca chn SQW/OUT khi u ra xung

vung l disable. Nu SQWE = 0 th mc logic chn SQW/OUT s l 1 nu OUT=1 v
OUT = 0 nu OUT = 0 .
SQWE(square wave enable): bit ny c thit lp 1 s enable u ra ca b to dao
ng. Tn s ca u ra sng vung ph thuc vo gi tr ca RS1 v RS0.
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DS1307 h tr bus 2 dy 2 chiu v giao thc truyn d liu. thit b gi d liu ln

bus c gi l b pht v thit b nhn gi l b thu. thit b iu khin qu trnh ny gi
l master. thit b nhn s iu khin ca master gi l slave. Cc bus nhn s iu khin
ca master,l thit b pht ra chui xung clock(SCL),master s iu khin s truy cp
bus,to ra cc ch th START v STOP.
d) S truyn nhn d liu trn chui bus 2 dy :
Tu thuc vo bit R/ w m 2 loi truyn d liu s c thc thi:
Truyn d liu t master truyn v slave nhn: Master s truyn byte u tin l a
ch ca slave. Tip sau l cc byte d liu . slave s gi li bit thng bo nhn c
(bit acknowledge) sau mi byte d liu nhn c. d liu s truyn t bit c gi tr nht
(MSB).
Truyn d liu t slave v master nhn: byte u tin (a ch ca slave) c
truyn ti slave bi master. Sau slave s gi li master bit acknowledge. tip theo
slave s gi cc byte d liu ti master. Master s gi cho slave cc bit acknowledge sau
mi byte nhn c tr byte cui cng,sau khi nhn c byte cui cng th bit
acknowledge s khng c gi .
Master pht ra tt c cc chui xung clock v cc ch th START v STOP. s truyn
s kt thc vi ch th STOP hoc ch th quay vng START. Khi ch th START quay
vng th s truyn chui d liu tip theo c thc thi v cc bus vn cha c gii
phng. D liu truyn lun bt u bng bit MSB.
e) DS1307 c th hot ng 2 ch sau:

Ch slave nhn( ch DS1307 ghi):chui d liu v chui xung clock s c
nhn thng qua SDA v SCL. Sau mi byte c nhn th 1 bit acknowledge s c
truyn. cc iu kin START v STOP s c nhn dng khi bt u v kt thc mt
truyn 1 chui. nhn dng a ch c thc hin bi phn cng sau khi chp nhn a ch
ca slave v bit chiu. Byte a ch l byte u tin nhn c sau khi iu kin START
c pht ra t master. Byte a ch c cha 7 bit a ch ca DS1307, l 1101000, tip
theo l bit chiu (R/ w) cho php ghi khi n bng 0. sau khi nhn v gii m byte a
ch th thit b s pht i 1 tn hiu acknowledge ln ng SDA. Sau khi DS1307 nhn
dng c a ch v bit ghi th master s gi mt a ch thanh ghi ti DS1307 , to ra
mt con tr thanh ghi trn DS1307 v master s truyn tng byte d liu cho DS1307 sau
mi bit acknowledge nhn c. sau master s truyn iu kin STOP khi vic ghi
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hon thnh.
Ch slave pht ( ch DS1307 c): byte u tin slave nhn c tng t nh

ch slave ghi. Tuy nhin trong ch ny th bit chiu li ch chiu truyn ngc li.
Chui d liu c pht i trn SDA bi DS 1307 trong khi chui xung clock vo chn
SCL. Cc iu kin START v STOP c nhn dng khi bt u hoc kt thc truyn
mt chui. byte a ch nhn c u tin khi master pht i iu kin START. Byte a
ch cha 7 bit a ch ca slave v 1 bit chiu cho php c l 1. Sau khi nhn v gii m
byte a ch th thit b s nhn 1 bit acknowledge trn ng SDA. Sau DS1307 bt
u gi d liu ti a ch con tr thanh ghi thng qua con tr thanh ghi.Nu con tr
thanh ghi khng c vit vo trc khi ch c c thit lp th a ch u tin
c c s l a ch cui cng cha trong con tr thanh ghi .DS1307 s nhn c mt
tn hiu Not Acknowledge khi kt thc qu trnh c. c d liu-ch slave pht.
Thi gian thc hin vic c,ghi d liu ca DS1307: s ng b:
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4. LED 7thanh:
Led 7 thanh bao gm nhiu loi led tch hp bn trong cc led c ni chung nhau 1
chn .Trong thc t c 2 loi led 7 thanh l loi anot chung v loi katot chung. Trong
Trang 19
chng trnh nay s dng loi anot chung , cc led s c chung nhau chn ngun (chn
dng) chn cn li a,b,c,d,e,f,g ca led no c ni t th led s sng.
ra c cc con s tng ng ta c bng logic sau:
Chng III : Cc khi mch cn s dng v s

mch hon chnh
1.
Khi to ngun:
y l mch dng to ra ngun in p chun +5V. S dng IC7805.

u vo l in p xoay chiu sau khi c bin i qua my bin th, a vo b Diod
cu cho ra dng in mt chiu( lc ny in p nm trong khong t 7->10V). Sau
khi i qua IC n p 7805 s to ra ngun in p chun +5V cung cp cho mch.
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2.
Khi Reset:
Khi RESET c tc dng a vi iu khin v trng thi ban u. Khi nt Reset c n

in p +5V t ngun c ni vo chn Reset ca vi iu khin c chy thng xung
t lc ny in p ti chn vi iu khin thay i t ngt v 0, VK nhn bit c s
thay i ny v khi ng li trng thi ban u cho h thng.
3.
Khi iu khin:
Gm 3 nt n, hot ng tng t nt Reset. Khi n nt th chn 2,3 c ni vi chn

1,4 a in p xung t lc ny in p ti 2 chn 2,3 bng 0 lm cho vi iu khin
nhn bit c s thay i ny v thc hin lnh cn iu khin.Nt th nht c tc dng
thit t ch cho vi iu khin lm vic bnh thng hay chuyn sang ch ci t
thi gian. Nt th hai lm tng thi gian cn iu chnh, nt 3 lm gim thi gian.
4.
Khi to xung dao ng:
Trang 21
y l b dao ng thch anh c tc dng to xung nhp vi tn s 12MHz cho

VK hot ng. Hai u ny c ni vo 2chn XTAL1 v XTAL2 ca VK.
5. Khi hin th:
Trang 22
Khi hin th bao gm cc LED 7thanh(anode chung) c cc u vo a,b,c,d,e,f,g ca

cc LED c ni song song vi nhau v ni vi cc chn ca PA(t chn PA0->PA6)
c tc dng lm cho LED hin th dng s mong mun. V u cn li ca 6led 7thanh
c ni vi 6 chn E ca transistor C828 v chn B ca transistor ni vi PORTC(t
PC0->PC5 ca vi iu khin), VK lm nhim v iu khin cho tng LED sng trong
khong thi gian nht nh.
6. Khi to thi gian thc:
Trang 23
DS1307 l mt IC thi gian thc vi ngun cung cp nh, dng cp nht thi gian
v ngy thng vi 56 bytes SRAM. a ch v d liu c truyn ni tip qua 2 ng
bus 2 chiu. N cung cp thng tin v gi,pht,giy ,th,ngy ,thng, nm.Ngy cui
thng s t ng c iu chnh vi cc thng nh hn 31 ngy,bao gm c vic t
ng nhy nm. ng h c th hot ng dng 24h hoc 12h vi ch th AM/PM.
khng phi iu chnh li thi gian vo nhng lc b mt ngun, c th ni thm
1pin khong 3V vo chn s 3 ca IC DS1307 (sao cho chn + ca pin ni voIC v chn
ca pin ni xung t). Hai chn 1 v 2 ca DS1307 c ni vo b dao ng thch
anh c tn s 32,768KHz to dao ng cho IC hot ng.
Chng VI S Mch Hon Chnh

S mch nguyn l:
Trang 24
S mch in:
Trang 25
Chng VII: Chng trnh phn mm code

chng trnh lp trnh cho vi iu khin
ATMEGA16.
S thut ton:
Trang 26
Bt u
Xa gi
Gi >23
Tng gi
Xa pht
Pht>59
Gii m Led 7 thanh
To thi gian tr& qut

hin th
Khi to I2C&DS1307
Xut m hin th cho

LED & thanh
Thi gian tr 2ms
Tng pht
Qut qua tng
LED
Xa giy
Tng giy
Giy >59
Code chng trnh np cho ATmega16:

/**************************(^-^)START(^-^)**************************/
#include <mega16.h>
#include <delay.h>
// Khai bao PORT I2C
Trang 27
#asm
.equ __i2c_port=0x18 ; // Cho phep PORTB doc du lieu tu DS1307
.equ __sda_bit=1 ;
// Bit PORTB.1 la dau vao chan SDA cua DS1307
.equ __scl_bit=0 ;
// Bit PORTB.1 la dau vao chan SCL cua DS1307
#endasm
#include <i2c.h>
#include <ds1307.h>
//Khai bao ham I2C trong thu vien Codevision

//Khai bao thu vien DS1307 trong thu vien Codevision
//Dinh nghia cac chan dieu khien LED

#define led1 PORTC.0
//Dinh nghia cac chan vao cua phim nhan
#define set PIND.0
#define up PIND.1
#define down PIND.2
//Cac bit de quan ly trang thai cac phim
bit set0=1,set1=1,up0=1,up1=1,down0=1,down1=1;
//Ma Hex led 7 thanh
unsigned char code[]={0x40,0xF9,0xA4,0xB0,0x99,0x92,0x82,0xF8,0x80,0x90};
unsigned char h=15,m=45,s=55;//Bien gio phut giay
unsigned char kt=0,a=0,x=0;
/*Bien kt de kiem tra xem dang o che do nao
- kt=0 :Che do chay binh thuong
- kt=1 :Che do cai dat gio
- kt=2 :Che do cai dat phut
- kt=3 :Che do cai dat giay
-Bien a de kiem tra xem truoc do o che do cai dat nao khong
- a=0 :Truoc do khong cai dat gi
- a=1 :Truoc do la o che do cai dat -->Dat lai du lieu cho DS1307*/
//Ham con
void Kt_phim();
void Read_DS1307();
void Hien_thi();
void main(void)
{
Trang 28
//Cho phep PORTA xuat du lieu

PORTA=0xFF;
DDRA=0xFF;
//Cho phep PORTB nhan tin hieu vao
PORTB=0x00;
DDRB=0x00;
//Cho phep PORTC xuat du lieu
PORTC=0x00;
DDRC=0xFF;
//Cho phep PORTD nhan tin hieu vao
PORTD=0xFF;
DDRD=0x00;
// Khoi tao I2C
i2c_init();
//Khoi tao DS1307
rtc_init(0,0,0);
while (1)
{
x++;//Bien chay quan ly nhap nhay cac so tuong ung voi che do cai dat
Kt_phim();
Read_DS1307();
Hien_thi();
if(x==100){x=0;}
};
}
//Ham kiem tra cai dat va doc du lieu tu DS1307
void Read_DS1307()
{
if(kt==0)
{
if(a==1)
//Kiem tra truoc do co cai dat lai gio,phut,giay khong
{
//Neu co thi cai dat lai du lieu dau vao cho DS1307
rtc_set_time(h,m,s);a=0;
delay_us(300);
}
rtc_get_time(&h,&m,&s);
//Doc du lieu tu DS1307
}
}
//Ham quet LED
void Hien_thi()
{
/*Kiem tra xem dang o che do nao de hien thi
- Neu kt=0:Che do chay binh thuong-->hien thi gio binh thuong
- Neu kt khac 1 dang o che do cai dat khac-->hien thi gio binh thuong
Trang 29
- Neu kt=1 dang o che do cai dat gio-->Hien thi gio nhap nhay
*/
if((kt==0)||(kt!=1)||((kt==1)&&(x<50)))
{
PORTA=code[h/10];led1=1;delay_us(2000);led1=0;
PORTA=code[h%10];led2=1;delay_us(2000);led2=0;
}
if((kt==0)||(kt!=2)||((kt==2)&&(x<50))) //Tuong tu nhu KT gio
{
PORTA=code[m/10];led3=1;delay_us(2000);led3=0;
PORTA=code[m%10];led4=1;delay_us(2000);led4=0;
}
if((kt==0)||(kt!=3)||((kt==3)&&(x<50)))//Tuong tu nhu KT gio
{
PORTA=code[s/10];led5=1;delay_us(2000);led5=0;
PORTA=code[s%10];led6=1;delay_us(2000);led6=0;
}
}
//Ham kiem tra phim
void Kt_phim()
{
set0=set1;set1=set;
if((set0==1)&&(set1==0))
{
kt++;if(kt>3)kt=0;
}
switch(kt)
{
//Lua chon che do ung voi gia tri cua bien kt
case 0:break;
case 1:
//Kiem tra trang thai ban dau cua phim

//Kiem tra xem phim co dc nhan nha hay khong
//Neu dc nhan nha thi tang kt++,neu khong thi
//doi toi khi nao phim dc nha moi tang bien kt
//Tro lai che do chay binh thuong
//Che do cai dat gio

{
up0=up1;up1=up;a=1;
if((up0==1)&&(up1==0))
{
h++;if(h>23)h=0;
}
down0=down1;down1=down;//
if((down0==1)&&(down1==0))
{
h--;if(h>23)h=23;
Trang 30
}
break;
}
case 2:
//Che do cai dat phut

{
up0=up1;up1=up;a=1;
if((up0==1)&&(up1==0))
{
m++;if(m>59)m=0;
}
down0=down1;down1=down;
if((down0==1)&&(down1==0))
{
m--;if(m>59)m=59;
}
break;
}
case 3: //Che do cai dat giay

{
up0=up1;up1=up;a=1;
if((up0==1)&&(up1==0))
{
s++;if(s>59)s=0;
}
down0=down1;down1=down;
if((down0==1)&&(down1==0))
{
s--;if(s>59)s=59;
}
break;
}
}
}
/******************** (^-^) THE END (^-^)************************/
Trang 31

Dong Ho Thoi Gian Thuc DS1037

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Dong Ho Thoi Gian Thuc DS1037

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n 1: ti: Thit k ng h thi gian thc

n 1: ti: Thit k ng h thi gian thc

Chng I : Gii Thiu Chung.

n 1: ti: Thit k ng h thi gian thc

Chng 2: Cc linh kin chnh c s dng trong mch

Chng 3:Cc khi mch cn s dng v s mch hon

Chng 5: Chng trnh phn mm

n 1: ti: Thit k ng h thi gian thc

Chng I : Gii Thiu Chung

Chng II: Cc linh kin chnh c s dng

Vi iu khin Atmega 16.

n 1: ti: Thit k ng h thi gian thc

ATmega16 c cc c im sau: 16KB b nh Flash vi kh nng c trong khi ghi, 512

n 1: ti: Thit k ng h thi gian thc

C: Carry Flag ;c nh (Nu php ton c nh c s c thit lp).

n 1: ti: Thit k ng h thi gian thc

Con tr ngn xp (SP)

n 1: ti: Thit k ng h thi gian thc

Ngt l mt c ch cho php thit b ngoi vi bo cho CPU bit v tnh

n 1: ti: Thit k ng h thi gian thc

n 1: ti: Thit k ng h thi gian thc

n 1: ti: Thit k ng h thi gian thc

Port D (PD): Port D gm 8 chn (t chn 14 n 21):chc nng xut nhp

S pha di IC 7805 c 3 chn:

n 1: ti: Thit k ng h thi gian thc

Ng ra OUT lun n nh 5V d in p t ngun cung cp thay i. Mch ny dng

IC to thi gian DS1307:

IC thi gian thc l h vi iu khin ca hng dalat. DS1307 c mt s c trng c

n 1: ti: Thit k ng h thi gian thc

n 1: ti: Thit k ng h thi gian thc

n 1: ti: Thit k ng h thi gian thc

thit lp 1 chn SQW/OUT pht i 1 trong 4 tn s (1Hz,4kHz,8kHz,32kHz). Chn

n 1: ti: Thit k ng h thi gian thc

OUT(output control): bit ny iu khin mc ra ca chn SQW/OUT khi u ra xung

n 1: ti: Thit k ng h thi gian thc

DS1307 h tr bus 2 dy 2 chiu v giao thc truyn d liu. thit b gi d liu ln

e) DS1307 c th hot ng 2 ch sau:

n 1: ti: Thit k ng h thi gian thc

Ch slave pht ( ch DS1307 c): byte u tin slave nhn c tng t nh

Thi gian thc hin vic c,ghi d liu ca DS1307: s ng b:

n 1: ti: Thit k ng h thi gian thc

n 1: ti: Thit k ng h thi gian thc

Chng III : Cc khi mch cn s dng v s

y l mch dng to ra ngun in p chun +5V. S dng IC7805.

n 1: ti: Thit k ng h thi gian thc

Khi RESET c tc dng a vi iu khin v trng thi ban u. Khi nt Reset c n

Gm 3 nt n, hot ng tng t nt Reset. Khi n nt th chn 2,3 c ni vi chn

Khi to xung dao ng:

n 1: ti: Thit k ng h thi gian thc

y l b dao ng thch anh c tc dng to xung nhp vi tn s 12MHz cho

5. Khi hin th:

n 1: ti: Thit k ng h thi gian thc

Khi hin th bao gm cc LED 7thanh(anode chung) c cc u vo a,b,c,d,e,f,g ca

6. Khi to thi gian thc:

n 1: ti: Thit k ng h thi gian thc

Chng VI S Mch Hon Chnh

n 1: ti: Thit k ng h thi gian thc

n 1: ti: Thit k ng h thi gian thc

Chng VII: Chng trnh phn mm code

n 1: ti: Thit k ng h thi gian thc

Gii m Led 7 thanh

To thi gian tr& qut

Xut m hin th cho

Thi gian tr 2ms