Addressing Modes: CS1251 Computer Organization Carl Hamacher

Addressing Modes
CS1251 Computer Organization Carl Hamacher
copyright 2011-2015
WWW.VidyarthiPlus.in
Addressing Modes
Name Immediate Register Absolute (Direct) Indirect Index Relative Autoincrement Autodecrement Syntax #Value Ri LOC (Ri) (LOC) X(Ri) X(PC) (Ri)+ (Ri) Addressing Function Operand = Value EA = Ri EA = LOC EA = [Ri] EA = [LOC] EA = [Ri] + X EA = [PC] + X EA = [Ri]; Ri [Ri] + 1 Ri [Ri] 1; EA = [Ri]
EA = Effective Address
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Absolute, Register, Immediate

Assembly Language
MOVE NUM1,R1 MOVE #1,R2 ADD #1,R1 ADD R1,R2
Register Transfer Notation

R1 [NUM1] R2 1 R1 1 + [R1] R2 [R1] + [R2]
copyright 2011-2015
Instruction Results
MOVE #NUM2,R0 MOVE NUM1,R1 MOVE #5,R2 ADD #-1,R2
MEM
Label Addr 0B NUM1 NUM2 0C 0D 0E X"000A" X"0007" Contents Addr 0 1 2 3
REGS
Contents X"000D" X"000A" X"0004" X"0005"
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Indirect Addressing
Assembly Language
MOVE (R0),R2 MOVE (R1),NUM1 ADD (R3),R1 ADD #1,(R3)

R2 [MEM([R0])] MEM(NUM1) [MEM([R1])] R1 [MEM([R3])] + [R1] MEM([R3]) 1 + [MEM([R3])]
copyright 2011-2015
Instruction Results
MOVE (R0),R2 MOVE (R1),NUM1 ADD #1,(R3)
MEM
Label Addr 12 NUM1 NUM2 13 14 15 Contents X"0003" X"0004" X"0009" X"0007" X"0009" Addr 0 1 2 3
REGS
Contents X"0014" X"0015" X"0007" X"0012"
copyright 2011-2015
Loop to Add n Numbers

MOVE N,R1 CLEAR R0 LOOP Program loop
Determine address of "Next" number and add "Next" number to R0
Counter Accumulator
DECREMENT R1 BRANCH>0 LOOP MOVE R0,SUM

. . .
PC [PC] + Offset (CC>0)
SUM N NUM1
. . .
NUMn
Use of Indirect Addressing

R0 MOVE MOVE CLEAR LOOP ADD ADD DECREMENT BRANCH>0 MOVE N,R1 #NUM1,R2 R0 (R2),R0 #1,R2 R1 LOOP R0,SUM R1 R2 R3 0 n NUM1 Accumulator Counter Pointer
SUM N NUM1
. . .
NUMn
copyright 2011-2015
Indexed Addressing (Arrays)

Assembly Language
MOVE X(R0),R1 MOVE R2,Y(R3) ADD Z(R1),R2

R1 [MEM(X + [R0])] MEM(Y + [R3]) [R2] R2 [MEM(Z + [R1])] + [R2]
copyright 2011-2015
Assembly Language to Machine Instructions

Assembler (Program)
Source Program (Assembly Language) Object Program (Machine Instructions)
Assembler Directives (Commands)

How to Interpret Names Where to Place Instructions in Memory Where to Place Data in Memory
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10
Assembler Directives
SUM EQU ORIGIN N DATAWORD NUM1 RESERVE ORIGIN START MOVE MOVE CLR LOOP ADD ADD DEC BGTZ MOVE RETURN END 200 201 300 300 100 N,R1 #NUM1,R2 R0 (R2),R0 #1,R2 R1 LOOP R0,SUM START
START
100 101 102
MOVE N,R1 MOVE #NUM1,R2 CLEAR R0 ADD (R2),R0 ADD #1,R2 DECREMENT R1 BRANCH>0 LOOP MOVE R0,SUM
. . .
LOOP
103 104 105 106 107
SUM N NUM1
200 201 202

11
300
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Two-Pass Assembler
First Pass
Create Symbol Table Names Assigned Numerical Values
Second Pass
Translates Assembly Language to Machine Code Substitutes Values for Names Computes Branch Offsets
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12
Encoding of Machine Instructions

Opcode Source Dest Other Info
One-Word Instruction
Opcode
Source
Dest
Other Info
Memory Address / Immediate Operand

Two-Word Instruction
Opcode
Ri
Rj
Rk
Other Info
Three-Operand Instruction
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13
HW2 Instruction Encoding

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
OP
SRC
DST
VALUE
IR
Assembly Language
OP SRC, DST

DST [SRC] OP [DST]
Example
MOVE R1,R2
Example
R2 [R1]
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HW2 Addressing Modes

Mode REG # Name 00 SRC 01 10 11 00-11 00-11 XX XX Register Direct Immediate Absolute Syntax Rn #Value Value Addr Fn EA = Rn EA = [Rn] Operand = Value EA = Value
Register Indirect (Rn)
Mode REG # Name DST 0 1 00-11 XX Register Direct Absolute
Syntax Rn Value
Addr Fn EA = Rn EA = Value
EA = Effective Address
Single-Bus Architecture
BUS A 6
MAR
1
MEM MDR
MUX
2 1 2
PC
ROM
IR
2
6 MUX
REGS
A ALU R B
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16
SRC Control Flowchart

Reg Direct 00
Y
Reg Indir 01
Y
Y [REGS([SRC_REG])]
MAR [REGS([SRC_REG])]
MDR [MEM([MAR])]
Y [MDR]
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17
SRC Control Flowchart

Immediate 10
Y
Absolute 11
Y
Y Value
MAR Value
MDR [MEM([MAR])]
Y [MDR]
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18
DST Control Flowchart

Reg Direct 0
Y
Absolute 1
Y
REGS([DST_REG]) [Z]
MAR Value
MDR [Z]
MEM([MAR]) [MDR]
copyright 2011-2015
19
Questions?
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Addressing Modes

CS1251 Computer Organization Carl Hamacher

Absolute, Register, Immediate

Register Transfer Notation

Register Transfer Notation

Loop to Add n Numbers

DECREMENT R1 BRANCH>0 LOOP MOVE R0,SUM

PC [PC] + Offset (CC>0)

Use of Indirect Addressing

Indexed Addressing (Arrays)

Register Transfer Notation

Assembly Language to Machine Instructions

Assembler Directives (Commands)

100 101 102

103 104 105 106 107

200 201 202

Encoding of Machine Instructions

Memory Address / Immediate Operand

HW2 Instruction Encoding

Register Transfer Notation

HW2 Addressing Modes

Register Indirect (Rn)

Mode REG # Name DST 0 1 00-11 XX Register Direct Absolute

SRC Control Flowchart

SRC Control Flowchart

DST Control Flowchart

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