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Chapter 9
 
OISC MAPPINGS
Simulating Real Processors with OISC 
Let him that would move the world first move himself.
Socrates (469-399 B.C.), Greek philosopher who was willing to call everything into questionto find genuine knowledge.
9.1
 
Mapping OISC to Conventional Architectures
It has been noted that one of the advantages in studying OISC is that itcan be used to benchmark existing instruction sets. In this chapter such aprocess is demonstrated for the four architecture types. The strategyinvolves mapping or simulating each architecture with a OISC architecture.This is done for both MOVE and SBN OISCs.
9.1.1
 
Stack (0-operand)
A stack-based architecture is not easily mapped to either basic type of OISC. Both MOVE and SBN use memory addresses, and SBN branchesforward to another memory address. The memory address space is linearand accessible to each instruction.A stack architecture, however, views memory as a stack, which isaccessed not directly, but indirectly using PUSH and POP, which are inverseoperations. PUSH writes to memory, and then moves to the successorlocation, and POP reads the memory location then moves to the predecessorlocation. Hence operands are implicit to the stack access, and not explicitlyavailable.Direct access to memory locations being used by the stack is notpossible. Both the MOVE and SBN instructions require access to memory,and SBN the capability to continue execution ahead in memory.Nonetheless, partial mappings are possible.
 
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Chapter 9
9.1.1.1
 
MOVE
Because actual memory addresses are inaccessible directly, mapping astack architecture is very difficult, if not impossible, using a MOVE OISCinstruction. The duality of the PUSH and POP instructions means that eachwould have to have its own instruction, resulting in two instructions at aminimum.Alternatively, a bit could be used to indicate read or write, but then for aMOVE it becomes:
MOVE push-flag x,yMOVE 0 x, y
x:= y or push y, x;
MOVE 1 x, y
y:= x or pop x, y;
 
Furthermore, a stack has an implicit count of operands, which wouldrequire an implicit stack counter register. The two instructions become aMOVE-PUSH or POP:
MPP 0, x;
MOVE 
Push or Pop, false so Push
MPP 1, x;
MOVE 
Push or Pop, true so Pop
 
In each case, MOVE has an associated bit, so there are really two MOVEinstructions, not one.
9.1.1.2
 
Stack using SBN
SBN could be used to implement a stack architecture by using a bit toindicate SBN and PUSH if true, else POP.
;
PUSH x-y, branch to z if (x-y) < 0
SBN 0, x, y, z; x = x – yPUSH x; if x-y < 0GOTO z;;
POP x-y, branch to z if (x-y) < 0,
; if x = x – y POP xSBN 1 x, y, z; is it if x < 0? If so have to use y; if x-y < 0 store difference temporarilyGOTO z;
 
OISC Mappings
75The second case illustrates that SBN can push the difference of the twooperands, but the difference is not pushed in the other variant; it is simplypart of the decision to branch or continue to the next address. SBN with aPOP means that the operandam does not contain the result of the differenceoperation. The operandum could follow van der Poel’s criterion, that is, theoperandam contains the top of the stack, and the operandum contains thedifference.Also, if van der Poel’s criterion were not used in the SBN operation, thenthe difference would have to be stored in a temporary location, implyinganother implicit register. Whereas with a PUSH operation, the operandamcontains the difference, and by van der Poel’s criterion, so would theoperandum. The POP operation, however, does not. Therefore, an SBNOISC stack architecture would need an implicit stack counter, and possiblya difference register.Therefore, in the SBN OISC, like the MOVE OISC, two variants of thesame instruction are needed. Clearly, OISC with stack architecture isimpossible.
9.1.2
 
Accumulator
The accumulator architecture uses the accumulator as the central implicitregister for all instruction operations that contain the operandam and result.The operandum is taken from memory or another register. The accumulatorarchitecture is like the stack architecture in that it is not easily mapped toOISC. With an implicit register for all operations, the OISC instruction hasto handle the accumulator as a special case, and not just a typical memory.The solution in implementing both types of OISC instructions is to rely lesson the accumulator.
9.1.2.1
 
MOVE
With accumulator architecture, the accumulator is implicitly the registerof choice with one of the operands and the result. A MOVE-based OISC thememory location of an operand contains the actual functionality. MOVE-based architecture with an accumulator is difficult because of the mixing of memory and accumulator. For the different kinds of MOVE, there is just anoperand, or operandam with operandum.MOVE-based accumulator architecture would have the instructions of the form:
 
MOVE y ; Mem[y] = accMOVE x ; acc = Mem[x]MOVE x, y ; Mem[y] = Mem[x]
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