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Contents
Preface................................................................................................XIII
 
Acknowledgments................................................................................XV
 
1. One Instruction Set Computing...................................................1
 
1.1
 
What is One Instruction Set Computing?..................................1
 
1.2
 
Why Study OISC?........................................................................2
 
1.3
 
A Look Ahead ...............................................................................3
 
1.4
 
Exercises........................................................................................3
 
2 Instruction Sets.............................................................................5
 
2.1
 
Elements of an Instruction...........................................................5
 
2.2
 
Operands .......................................................................................5
 
2.3
 
Instruction Formats......................................................................6
 
2.3.1
 
4-tuple Form...........................................................................6
 
2.3.2
 
3-tuple Form...........................................................................7
 
2.3.3
 
2-tuple Form...........................................................................7
 
2.3.4
 
1-tuple and 0-tuple Forms.......................................................8
 
2.3.5
 
Mixed Forms...........................................................................9
 
2.4
 
Core Set of Instructions................................................................9
 
2.4.1
 
Horizontal-bit Operation.........................................................9
 
 
viii
Contents
2.4.2
 
Vertical-bit Operation...........................................................10
 
2.4.3
 
Control..................................................................................10
 
2.4.4
 
Mathematical........................................................................10
 
2.4.5
 
Data Movement....................................................................10
 
2.4.6
 
Other Instructions.................................................................11
 
2.5
 
Addressing Modes.......................................................................11
 
2.5.1
 
Immediate Data.....................................................................11
 
2.5.2
 
Direct Memory Location......................................................12
 
2.5.3
 
Indirect Memory Location....................................................12
 
2.5.4
 
Other Addressing Modes......................................................12
 
2.6
 
Exercises......................................................................................12
 
3 Types of Computer Architectures..............................................15
 
3.1
 
Overview......................................................................................15
 
3.2
 
A Simple Taxonomy ...................................................................18
 
3.2.1
 
Stack.....................................................................................18
 
3.3
 
Accumulator................................................................................19
 
3.4
 
Register-Memory........................................................................19
 
3.5
 
Register-Oriented .......................................................................20
 
3.6
 
Exercises......................................................................................21
 
4 Evolution of Instruction Sets.....................................................23
 
4.1
 
Motivation ...................................................................................23
 
4.1.1
 
“Big Iron” Computers...........................................................23
 
4.1.2
 
First Stored Program Computers..........................................24
 
4.1.3
 
Later Mainframes and Minicomputers.................................26
 
4.2
 
Evolution of Microprocessors....................................................27
 
4.2.1
 
Complex Instruction Set Microprocessors............................27
 
4.2.2
 
Reduced Instruction Set Microprocessors...........................28
 
4.2.3
 
Other Microprocessor Architectures.....................................29
 
4.3
 
Timeline.......................................................................................31
 
4.4
 
Exercises......................................................................................31
 
5 CISC, RISC, OISC......................................................................33
 
 
Contents
ix
5.1
 
CISC versus RISC......................................................................33
 
5.2
 
Is OISC a CISC or RISC?..........................................................34
 
5.3
 
Processor Complexity.................................................................35
 
5.3.1
 
Complexity of CISC.............................................................35
 
5.3.2
 
RISC.....................................................................................36
 
5.3.3
 
OISC.....................................................................................36
 
5.3.4
 
Comparing Complexity.........................................................37
 
5.4
 
Exercises......................................................................................38
 
6 OISC Architectures.....................................................................41
 
6.1
 
Single Instruction Types.............................................................41
 
6.1.1
 
Subtract and Branch if Negative (SBN)................................41
 
6.2
 
MOVE..........................................................................................42
 
6.2.1
 
Half Adder............................................................................43
 
6.3
 
Comparing OISC Models...........................................................44
 
6.3.1
 
SBN.......................................................................................44
 
6.3.2
 
MOVE...................................................................................46
 
6.3.3
 
Which OISC Instruction is Better?.......................................47
 
6.4
 
Variants of SBN and MOVE......................................................47
 
6.4.1
 
Variations on SBN................................................................48
 
6.4.2
 
Variations on MOVE............................................................49
 
6.5
 
OISC Continuum........................................................................49
 
6.6
 
Exercises......................................................................................50
 
7 Historical Review of OISC..........................................................51
 
7.1
 
Subtract and Branch if Negative (SBN)....................................51
 
7.1.1
 
van der Poel..........................................................................51
 
7.1.2
 
Mavaddat and Parham..........................................................51
 
7.1.3
 
Half Adder (1990).................................................................52
 
7.2
 
MOVE-based...............................................................................52
 
7.2.1
 
English Electric DEUCE (1953)...........................................52
 
7.2.2
 
GRI Computer GRI 909 Minicomputer (1969)....................52
 
7.2.3
 
Burroughs B1700/B1800 Micro Architecture (1972)...........53
 
7.2.4
 
New England Digital ABLE (1973).....................................53
 
7.2.5
 
Daniel Tabak/G. Jack Lipovski (1980).................................53
 
7.2.6
 
Henk Corporaal/MOVE Transport-Triggered (1987)...........53
 
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