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JOURNAL OF APPLIED PHYSICS 106, 024502 共2009兲

Correlation between defect density and current leakage in InAs/ GaAs


quantum dot-in-well structures
A. M. Sanchez,1,a兲 R. Beanland,2 N. F. Hasbullah,3 M. Hopkinson,3 and J. P. R. David3
1
Departamento Ciencias Materiales e I.M. y Q.I., Campus Universitario de Puerto Real, 11510
Puerto Real, Cádiz 11510, Spain
2
Department of Physics, University of Warwick, Coventry CV4 7AL, United Kingdom
3
Department of Electronic and Electrical Engineering, University of Sheffield, Sheffield S1 3JD, United
Kingdom
共Received 13 March 2009; accepted 9 June 2009; published online 20 July 2009兲
We present a study of InAs/ GaAs quantum dot-in-well 共DWELL兲 material using transmission
electron microscopy and leakage current-voltage measurements. The spacer layers between the
DWELL layers have a variety of annealing and growth temperatures. We show that there is a strong
correlation between spacer layer, annealing temperature, defect density, and these leakage currents,
with the most defective sample having 30 times more defects and a leakage current several orders
of magnitude above that of the least defective. Cross section transmission electron microscope
共TEM兲 shows that surface roughness above defective dots is responsible for the high defect
densities. However, even in the best sample the reverse bias leakage current is several orders of
magnitude above that typically seen in quantum well materials and a measurable density of
defective dots are observed in planar view TEM. © 2009 American Institute of Physics.
关DOI: 10.1063/1.3168492兴

I. INTRODUCTION II. RESULTS

Self-assembled quantum dots 共QDs兲 may allow the pro- Planar view and cross section TEM specimens were
duction of semiconductor lasers with lower threshold cur- made of unprocessed material. Planar view specimens were
rents and temperature sensitivity in comparison with quan- prepared by removing the material above and below the QD
tum well devices.1,2 InAs dots in an InGaAs well—the dot- layers to obtain a specimen with the active layers in the
in-well 共DWELL兲 structure—allows 1.3 ␮m emission at electron transparent region. Typical TEM images of the three
room temperature. Furthermore, this approach increases the samples are shown in Fig. 1. Defects were found in all three
QD density in comparison with the InAs/ GaAs system and samples, although the defect density of sample A, with no
increases carrier capture efficiency.3,4 anneal, is significantly higher than that of the other two.
Here we present transmission electron microscope Three types of defect were found: 共a兲 stacks of defective
共TEM兲 characterization and current density/voltage 共J-V兲 dots, where the defective region increases in each subsequent
measurements of three DWELL heterostructures 共A–C兲 with QD layer 关Fig. 1共a兲兴, only found in sample A; 共b兲 defective
details given in Table I. For each, the active region consisted dots that gave rise to threading dislocations and/or stacking
of five InAs:InGaAs DWELLs separated by 35 nm GaAs faults; and 共c兲 defective dots that gave rise to no threading
spacer layers. Each DWELL consisted of 3.0 ML InAs on dislocations. For sample C, no defective dots were observed
2 nm In0.15Ga0.85As, covered by 6 nm In0.15Ga0.85As. After in cross section images, as might be expected since the vol-
DWELL growth and deposition of 5 nm GaAs, growth was ume of the material examined in a cross section TEM speci-
halted for samples B and C, while the temperature was men is very small, and no threading dislocations were ob-
ramped over 150 s to an annealing temperature Tann which served in planar view images, which places an upper limit on
was maintained for a further 60 s, before growth of the re- the threading dislocation density of approximately
maining 30 nm of GaAs at TG = 585 ° C. No growth halt or
annealing was employed for sample A. These active layers TABLE I. Growth temperatures, fitting parameters, and dot/defect densities.
lie at the center of an undoped 50 nm GaAs:AlGaAs cavity,
with 1.2 ␮m Al0.4Ga0.6As cladding layers and a 300 nm p+ A B C
GaAs contact layer. We have found previously that inclusion Tann 共°C兲 ¯ 585 610
of the annealing step has a significant beneficial effect on the TG, GaAs 510 510 510
material quality.5 A previous electroluminescence study on spacer 共°C兲
the same samples suggested that the reduction in EL intensity TG, DWELL 共°C兲 515 505 505
at room temperature and above in these samples is due to n 艌2 1.7 1.4
thermal escape of carriers from the QDs to the GaAs barrier, ␳dot 共cm−2兲 1.6⫻ 1010 3.0⫻ 1010 3.5⫻ 1010
where they recombine nonradiatively with defects.6 ␳TD 共cm−2兲 1.3⫻ 108 1.5⫻ 107 共0兲
␳def 共cm−2兲 5.7⫻ 108 9 ⫻ 107 2 ⫻ 107
␳tot 共cm−2兲 7 ⫻ 108 1.1⫻ 108 2 ⫻ 107
a兲
Electronic mail: ana.fuentes@uca.es.

0021-8979/2009/106共2兲/024502/4/$25.00 106, 024502-1 © 2009 American Institute of Physics

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024502-2 Sanchez et al. J. Appl. Phys. 106, 024502 共2009兲

FIG. 1. Typical cross section and pla-


nar view TEM images of 关共a兲 and 共b兲兴
A, 关共c兲 and 共d兲兴 B, and 关共e兲 and 共f兲兴 C.
Defective dots and threading disloca-
tions visible in the planar view images
are marked.

1 ⫻ 104 cm−2. Several planar view TEM images were ana- 200 ␮m, and the data were converted to units of current
lyzed for each sample 共counting ⬎2500 QDs for samples A density-voltage 共J-V兲 by dividing by the mesa area. In all
and B and ⬎4000 QDs for sample C兲, allowing measure- cases the resulting J-V curves were coincident to within a
ments of dot density and defect density to be made, given in few percent, indicating the reproducibility of the measure-
Table I. The benefits of the annealing step are clear, resulting ments and the bulk nature of the dominant current transport
in the elimination of defective stacks of dots and a significant mechanism. Average FB J-V curves for the three samples are
reduction 共approximately 30 times from samples A to C兲 in shown in Fig. 2, while the inset shows the RB current density
the density of defective dots, although they are not elimi- with respect to the electric field. All samples show relatively
nated completely. high FB and RB leakage currents in comparison with a typi-
Forward bias 共FB兲 and reverse bias 共RB兲 current-voltage cal quantum well structure.
measurements were performed at room temperature in a dark The FB current density in a diode can be approximated
enclosure. For each sample, measurements were made of with the diode equation, J ⬇ J0 exp共qV / nkT兲, when V
several circular mesas with nominal radii of 50, 100, and ⬎ 3kt / qV, where q = electron charge, k = Boltzmann’s con-

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024502-3 Sanchez et al. J. Appl. Phys. 106, 024502 共2009兲

FIG. 4. 共Color online兲 Cross section TEM image of a defective dot in the
upper DWELL layer of sample A. A depression in the overlying
GaAs/ AlGaAs interface can be seen.

density, and ni is the intrinsic carrier concentration. Since all


three samples are nominally the same, with a band gap of
FIG. 2. FB J-V curves. The inset shows the RB J curves with respect to the
electric field. 0.95 eV,6 we expect ni to be similar. Further assuming that
the nature of the carrier capture cross section does not
change with Tann, differences in J0 are most likely to caused
stant, T = absolute temperature, V = applied bias, J0 is the by variations in Nt between the samples.
saturation current, and n is the ideality factor. Our measure- For all samples the RB current starts with an initial very
ments are summarized in Table I, where the value of n was rapid rise, followed by an approximately exponential depen-
determined at a current of 0.1 A / cm2 which, although large, dence on voltage up to breakdown, although the magnitudes
corresponds to an average of ⬍1 carrier/dot occupation. The are very different; the RB current density in sample B is
ideality factor n, J0, and the magnitude of the FB current all 10 000 times smaller than that in sample A but twice that of
decrease from sample A to sample C. The density of defec- sample C. Again, this correlates with the defect structure in
tive dots 共␳def兲, threading dislocations 共␳TD兲, and the total the material, with the main influence being the presence of
defect density 共␳tot兲 show a linear dependency against FB stacks of defective QDs 共sample A兲. However, in samples B
current over a broad range of FB currents. Figure 3 shows and C, which are free from these defects, a decrease in defect
the correlation at a FB of 0.5 V. We may interpret these data density of roughly five times only results in a halving of the
by noting that there are two components to FB current, the RB current.
diffusion current Idiff and generation-recombination current
IGR, the latter often assigned to recombination at midgap
III. DISCUSSION
states. A high IGR results in a large J0 and also an ideality
factor n of 2. A low IGR gives a smaller J0 and an n of 1 as It thus seems that the FB current is more sensitive to the
Idiff would dominate. The magnitude of the FB current will total defect density in the structure, while the RB current is
increase if either J0 and n increase, although it is more sen- highly influenced by the existence of multiple stacks of de-
sitive to changes in J0. Even for the best sample 共C兲 the fective QDs. Reduction 共preferably elimination兲 of defects in
ideality factor is n = 1.4, suggesting that IGR is still signifi- QD structures is very desirable due to their negative impact
cant. IGR ␣ qW␴␷thNtni / 2 in a p-i-n diode,7 where W is the on luminescence efficiency and device reliability. FB and RB
thickness of the intrinsic region, ␴ is the electron and hole leakage characteristics give a good indication of material
capture cross section, ␷th is the thermal velocity, Nt is the trap quality, provided the current scales with area and is not af-
fected by edge or perimeter effects. They can therefore be
used as a method to screen new structures for high defect
densities. However they give no information on the origin of
defective QDs, or why the use of spacer layer annealing has
such a significant impact.
It has been proposed that increasing TG after capping
with a thin layer causes the larger dots that protrude from the
cap to evaporate.8 This mechanism cannot occur in the
samples examined here since the dots are capped by 11 nm
of material before annealing is employed. However, there
have also been reports proposing that the reduction in defec-
tive stacks of dots which occurs upon the inclusion of an
anneal is due to a reduction in surface roughness.5 Here we
give direct evidence of this latter mechanism. Figure 4 shows
a cross section TEM image of sample A, with a defective QD
present in the uppermost DWELL layer. On the right, a lat-
FIG. 3. Plot of FB current density vs defective dot 共쎲兲, threading disloca- erally compressed version of the image is shown, which al-
tion 共䊏兲, and total defect density 共䉱兲 at 0.5 V. lows interfacial roughness to be seen more clearly. The po-

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024502-4 Sanchez et al. J. Appl. Phys. 106, 024502 共2009兲

sition of the GaAs:AlGaAs interface above the defective dot the leakage current for the smaller mesas as they would con-
is marked with a line, clearly showing a depression above the tain very few threading defects. This was not observed. We
dot. Large depressions are clearly visible in the stack of de- thus propose that the primary leakage current path in these
fective dots in Fig. 1共a兲, and it can be seen that the QDs samples is due to defective dots that do not produce thread-
which lie in the depression tend to be significantly larger ing dislocations. The exponential dependence of the current
than those lying on a planar surface. It thus seems reasonable on the applied bias is suggestive of a tunneling mechanism,
to suppose that a QD that nucleates in a depression will tend although due to the complexity of modeling current transport
to be larger, and therefore exceed the critical dimensions for through a defective DWELL structure this remains to be con-
the nucleation of defects more rapidly. Furthermore, it may firmed.
be expected that a growth halt and high temperature anneal- IV. SUMMARY
ing allows more efficient planarization of the GaAs surface
due to increased surface diffusion. We have investigated a set of three DWELL samples
Without this planarization before growth of subsequent with spacer layer annealing. We find that increasing Tann can
QD layers, the next layer of QDs may nucleate preferentially result in ⬎30 times fewer defective dots and threading de-
in the depressions, producing larger dots. This appears to fects, which is reflected in a RB leakage current density that
explain the origins of the stacks of defective dots seen in is 10 000 times lower. The RB J-V curves show an initial
sample A, especially since depressions of this kind were not rapid rise, followed by an exponential increase, which we
observed in samples B and C. attribute to leakage through defective QDs rather than
Several studies give a critical thickness hc for defect for- threading dislocations. The mechanism for the improvement
mation in InAs/ GaAs QD structures between 2.7 and 3.0 in the material quality appears to be the reduction in the
ML.9–11 However, we have shown here that the growth con- surface roughness of the spacer layers, which allows a more
ditions used for both the QDs and the surrounding layers uniform nucleation of QDs in subsequent layers and elimi-
nation of stacks of defective dots, and we have given clear
have a very large effect and a “critical thickness” may not be
evidence of interfacial roughness associated with defective
a particularly useful parameter to be used in the design of
QDs in the sample with the lowest spacer layer Tann.
QD structures. A better starting point is the observation that
once a QD exceeds a critical size 共in three dimensions兲, it 1
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