Welcome to Scribd, the world's digital library. Read, publish, and share books and documents. See more
Download
Standard view
Full view
of .
Look up keyword
Like this
23Activity
0 of .
Results for:
No results containing your search query
P. 1
8086 Internal Block Diagram Enotes

8086 Internal Block Diagram Enotes

Ratings:

4.5

(2)
|Views: 2,772 |Likes:
Published by veera
8086 internal block diagram
8086 internal block diagram

More info:

Published by: veera on Jul 21, 2009
Copyright:Attribution Non-commercial

Availability:

Read on Scribd mobile: iPhone, iPad and Android.
download as PDF, TXT or read online from Scribd
See more
See less

05/28/2013

pdf

text

original

 
 
Prof. S. Jagannathan,HOD – Dept of E & C Engg,R.V. C. E, Bangalore
8086 Internal Block diagram (Intel Corp.)
eNotes
By
Prof. S. Jagannathan,HOD – Department of Electronics andCommunication Engineering,R.V. College of Engineering, Bangalo
re
 
 
 
Prof. S. Jagannathan,HOD – Dept of E & C Engg,R.V. C. E, Bangalore
Session - IIIADVANCED MICROPROCESSORS
Contents
 
Block Diagram of 8086
 
segment registers
 
8086 flag register format
8086 Internal Block diagram (Intel Corp.)
The block diagram of 8086 is as shown. This can be subdivided into two parts, namelythe Bus Interface Unit and Execution Unit. The Bus Interface Unit consists of segmentregisters, adder to generate 20 bit address and instruction prefetch queue.Once this address is sent out of BIU, the instruction and data bytes are fetched frommemory and they fill a First In First Out 6 byte queue.
 
 
Prof. S. Jagannathan,HOD – Dept of E & C Engg,R.V. C. E, Bangalore
Execution Unit:
The execution unit consists of scratch pad registers such as 16-bit AX, BX, CX and DXand pointers like SP (Stack Pointer), BP (Base Pointer) and finally index registers such assource index and destination index registers. The 16-bit scratch pad registers can be splitinto two 8-bit registers. For example, AX can be split into AH and AL registers. Thesegment registers and their default offsets are given below.
Segment Register Default Offset
CS IP (Instruction Pointer)DS SI, DISS SP, BPES DIThe Arithmetic and Logic Unit adjacent to these registers perform all the operations. Theresults of these operations can affect the condition flags.Different registers and their operations are listed below:
Register Operations
AX Word multiply, Word divide, word I/OAL Byte Multiply, Byte Divide, Byte I/O, translate, Decimal ArithmeticAH Byte Multiply, Byte DivideBX TranslateCX String Operations, LoopsCL Variable Shift and RotateDX Word Multiply, word Divide, Indirect I/O

Activity (23)

You've already reviewed this. Edit your review.
1 hundred reads
1 thousand reads
Patricia KC liked this
Misbah Awajah liked this
Ausaf Ahmad liked this
Pydipati Sadhu liked this
Arsalan Qazi liked this
Pooja Devi liked this

You're Reading a Free Preview

Download
scribd
/*********** DO NOT ALTER ANYTHING BELOW THIS LINE ! ************/ var s_code=s.t();if(s_code)document.write(s_code)//-->