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J Nanopart Res (2008) 10:955963 DOI 10.

1007/s11051-008-9381-4

FOCUS ON NANOMANUFACTURING

Conformal dielectric lms on silicon nanowire arrays by plasma enhanced chemical vapor deposition
J. Fronheiser J. Balch L. Tsakalakos

Received: 11 November 2007 / Accepted: 16 March 2008 / Published online: 16 April 2008 Springer Science+Business Media B.V. 2008

Abstract In this article, we describe the coating of silicon nanowire arrays with thin dielectric layers using Plasma Enhanced Chemical Vapor Deposition (PECVD). The impact of deposition pressure, temperature, and nanowire array density on the silicon oxide coating thickness uniformity was assessed using a detailed electron microscopy observations of the nanowire arrays. Deposition rates were found to vary along the nanowire length as a function of the above process parameters, and ranged from 0 to 35 nm/min. The coating thickness was found to be most uniform at higher pressures and temperatures, and high-density nanowire arrays with smaller nanowire diameters and larger lengths led to the deposition of coating with a smaller thickness gradient along the wire length. Keywords Nanowire Silicon Silicon oxide Thin lm Coating PECVD Nanomanufacturing

Introduction In recent years there has been a signicant interest in the fundamental science of nanowire (NW) and nanotube (NT) arrays, including their synthesis

J. Fronheiser J. Balch L. Tsakalakos (&) General Electric - Global Research Center, Niskayuna, NY 12309, USA e-mail: tsakalakos@research.ge.com

(Cui et al. 2001 and Lew et al. 2004) and properties, as well as applications based on nanostructures. Many devices and applications have been demonstrated based on vertically aligned arrays, including eld-effect transistors (Goldberger et al. 2006), solar cells (Baxter et al. 2006; Law et al. 2005), lasers (Huang et al. 2001), super-hydrophobic surfaces (Rosario et al. 2004), biotemplating surfaces (Dong et al. 2006), and others. A critical factor in making useful structures from NW/NT arrays is the development of coating strategies that allow additional functionality for the array and/or to assist in improving their properties. This includes dielectric layers, active electronic lms, layers to impart biofunctionality, and layers to enhance mechanical robustness. In order to help the deposition processes for such coatings to be manufacturable, several major requirements must be attained: (a) the process must be inherently scalable to large areas; (b) relatively low processing times are required to coat large area, dense arrays; (c) the processing temperatures should be low to minimize damaging or changing the structure and thus properties of the arrays; and (d) the coatings should be uniform along the wire length and across the substrate. Furthermore, the deposition of such coatings on quasi- or one-dimensional nanostructure arrays should preferably be accomplished with standard processes such that adoption in a future manufacturing setting can be facilitated. While there have been several reports in the literature regarding coating of NW/NT arrays, it is

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evident that more work is required to elucidate the variables and mechanisms that control the process parameters described above. Atomic Layer Deposition (ALD) is the method that has been explored in greatest depth for coating of NW/ NT arrays. There are several benets of ALD that have been identied; these include (a) a high degree of conformality; (b) thickness control at the sub-nm level due to the self-limiting nature of the reactions involved; (c) deposition within structures that are laterally conned; (d) exibility to potentially deposit multiple compositions ranging from binary and multicomponent oxides to suldes, arsenides, etc. (Ritala and Leskala 1999). A particularly well-studied coating that has been applied by ALD is Al2O3. Min et al. (2003) deposited alumina on ZnO nanorods on Si substrates at 300 C using trimethylaluminum and water. They showed uniform, conformal layers on the ZnO nanorods without the presence of an interfacial alloy. The growth rate was *0.19 nm/cycle (22 s total cycle time). This method was subsequently used to fabricate alumina nanotubes by selectively wet etching the ZnO nanorod core (Hwang et al. 2004). ALD was also used to fabricate multi-layer coatings on carbon nanotube (CNT) arrays (Hermann et al. 2005). It was shown that some very uniform alumina/ W/alumina coatings could be deposited on CNTs so as to create a co-axial cable-type structure that allows for subsequent functionalization of the outer alumina layer. This allowed for attachment of peruorinated molecules to the structure that rendered the CNTs hydrophobic. Other applications have also been demonstrated, including multi-layer deposition of Ta2O5NbxZryOz multi-layer lms, TiO2 nanotubes formed using cellulose nanobers as templates, alumina nanotubes using electrospun poly(vinyl) pyrroline nanobers, titania deposition on Ni nanorod arrays, and Ru lm deposition within microporous Si (Leskela et al. 2007). Physical vapor deposition, as well as other chemical vapor deposition have also been used to coat NW/NT structures. CNTs were coated with W using a physical vapor deposition process in which a W lament was used as the source (T = 2473 K) and the sample was held at a relatively high temperature of 973 K (Zhang et al. 2000). Boron nitride coatings were applied to SiC NWs using B and SiO2 precursors heated in a BN crucible at 14001500 C (Tang et al. 2002). SiC nanowires were also coated with a carbon layer for

improving the strength of mechanical composites using a chemical vapor inltration (CVI) method at 1223 K (Yang et al. 2005). These methods, while effective in coating the nanostructures of interest, are also too high temperature to be suitable for most device-related applications. A relatively low-temperature method to coat NWs and NTs with oxides using an acid pre-treatment method has also been demonstrated (Gomathi et al. 2005). While these aforementioned processes have been shown to effectively coat NWs/NTs, it is desirable to use wellestablished processes that are inherently scalable and applicable to arrays on a substrate. Plasma-enhanced chemical vapor deposition (PECVD) is a process that meets many of the requirements outlined above. It is regularly used in the electronics and solar energy industries and largescale tools are available. Many compositions can be deposited by PECVD (much like ALD), such as silicon nitride, silicon oxide, and amorphous silicon, as well as crystalline semiconductors and conductors. (Reif 1984). While PECVD generally results in less conformal lms compared to ALD, we will show that it is possible to form relatively conformal coatings on nanowire arrays using PECVD, on par with results in the literature discussed above for ALD coatings. The processing temperatures are typically less than 400 C, making this process a strong candidate for future nanomanufacturing of coatings on NW/NT arrays. This is enabled by the fact that the plasma effectively dissociates precursor molecules, thus reducing the required process temperature. While PECVD has been used to synthesize nanowires (Hofmann et al. 2003) and nanotubes (Teo et al. 2002), to our knowledge there has been little or no work reported on coating of NW/NT arrays using PECVD. Here, we present an in depth analysis of a prototypical system, namely silicon oxide lms on silicon nanowires arrays, to highlight both the advantages of this process as well as opportunities for process improvements.

Experimental procedure Silicon nanowire arrays were grown on h111i oriented silicon substrates. Following deposition thick Au lm, catalytic CVD employing of a 50 A the vaporliquidsolid (VLS) growth mechanism (Wagner and Ellis 1964; Cui et al. 2001) was used

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to grow p-type Si nanowires with silane, hydrochloric acid, and trimethylboron (Lew et al. 2004). Both lowand high-density nanowire arrays were synthesized. High-density arrays were grown at 650 C for 30 min, whereas the low-density arrays were grown at 650 C for 30 min without the use of HCl. The arrays were subsequently coated with silicon oxide lms using a plasma-enhanced chemical vapor deposition (PECVD) system (Oxford Plasma100) The PECVD process consisted of owing silane (SiH4) and nitrous oxide (N2O) at a ow rate of 15 and 710 sccm, respectively operating at 13.56 MHz. Table 1 summarizes the specic conditions employed for each type of sample. The nanowire arrays were characterized using scanning electron microscopy (SEM) with a LEO VP1200 eld emission system. Results and discussion Figure 1 shows typical scanning electron micrographs (SEM) of the low- and high-density nanowire arrays prior to deposition of the PECVD silicon oxide. The low-density wires have a mean diameter of 182 81 nm and a length of *6 microns. Figure 2 shows the nanowire diameter distribution for a typical lowdensity and high-density sample. The nanowires in the high-density array have a mean diameter of 84 17 nm (Fig. 2) and a length of *22 microns. The high-density samples also show a bimodal length distribution, in which a population of shorter nanowires with lengths of 25 microns are observed (see Fig. 1). Figure 3 shows SEM images of low-density nanowires arrays coated with PECVD silicon oxide under the size conditions outlined in Table 1. It is

Fig. 1 SEM images of representative (a) low and (b) high density nanowires arrays before PECVD oxide deposition

evident that the thickness of the coating on the nanowires is not constant along the wire length. Figure 4 shows higher resolution SEM micrographs of the top and bottom of the low-density NW arrays. Deposition on the Au nanocatalyst particle at the tip, which is typically associated with the VLS mechanism, is clearly observed, and the fact that there is no re-growth of nanostructures from these particles is important. It is also evident that the silica layer is also fully deposited between wires on the thin polycrystalline SiAu layer that typically accompanies nanowires

Table 1 PECVD process parameters used to coat Si nanowires arrays in this study

Run ID

SiH4 (sccm)

N2O (sccm)

Pressure (mtorr)

Power (W)

Power density (mW/cm2) 37 37 37 37 37 37

Temp (C)

Time (min)

1 2 3 4 5 6

15 15 15 15 15 15

710 710 710 710 710 710

1000 500 1500 1000 500 1500

15 15 15 15 15 15

370 370 370 200 200 200

14 14 14 14 14 14

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40 35 30 Frequency 25 20 15 10 5 0 50 100 150 200 250 300 350 400 450 500 More

J Nanopart Res (2008) 10:955963

(a)

Wire Diameter (nm)


40 35 30 25 20 15 10 5 0

(b)

30

45

60

75

90

105

120

135

More

Wire Diameter (nm)

Fig. 2 Diameter distributions of (a) low and (b) high density nanowires arrays

growth using nanocatalyst that are not templated or patterned (Lombardi et al. 2006). As we are interested in the manufacturabity of this process, we studied the key geometrical parameters of the thin lm coating on the nanowires. Of

particular interest is the variation of the coating thickness with nanowire length. Therefore, the gradient of the nanowires thickness was measured as a function of length for various process parameters; array density and pressure are the parameters that are analyzed in this work. We dene the slope, or taper, of the PECVD oxide lm at a given position along the nanowire length as the change in thickness of the lm along the given segment divided by the length of the segment. This was measured for multiple nanowires in the array such that both an average taper and the standard deviation of the taper for the particular array was evaluated. Measurements were conducted by evaluating the coating thickness at several locations along the length of the wire. Figure 5 shows a higher magnication SEM image with arrows specifying measurement points. The diameter of the coated nanowires were measured in these locations and analyzed as described above. The lm deposited on the top of the NWs at the location of the Au catalyst nanoparticle was not included in these measurements. The taper of a PECVD oxide lm deposited on the low-density array is shown in Fig. 6. The slope steadily increases upon approaching the top of the NWs, and the smallest change in slope along the NW length is observed for run 3 and 6. These two were

Fig. 3 SEM images of low-density Si NW arrays coating with silicon oxide by PECVD using the conditions in runs 16 (af, respectively). Note the magnication is not the same for all

Frequency

images. The magnication bar for each image is for 1 micron, except for image (e) for which it is 2 microns

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J Nanopart Res (2008) 10:955963 Fig. 4 SEM images of the (a) top and (b) bottom regions of low-density Si NW arrays coated using run #1. The magnication bar for each image is for 1 micron

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1200 1000

Diameter (nm)

800 600 400 200 0 SiO2-1 LD SiO2-2 LD SiO2-3 LD SiO2-4 LD SiO2-5 LD SiO2-6 LD 0 1000 2000 3000 4000 5000 6000 7000

Position from NW base (nm)

Fig. 7 Total diameter (nanowire + oxide coating) for various deposition conditions on low-density nanowire arrays Fig. 5 Higher magnication showing measurement method. Arrows represent measurement points. The magnication bar is for 1 micron

0.3 0.25 0.2 SiO2-1 LD SiO2-2 LD SiO2-3 LD SiO2-4 LD SiO2-5 LD SiO2-6 LD

0.15 0.1 0.05 0 0 1000

2000

3000

4000

5000

6000

7000

Position from NW base (nm)

Fig. 6 Silicon oxide slope for various deposition conditions on low-density nanowire arrays

processed at the highest pressure used in this study, i.e. 1500 mTorr and suggests increasing pressure changes the plasma and lm properties such that smaller thickness gradients occur along the wire length. For comparison, the total nanowire thickness (Si NW plus oxide coating) as a function of position

along the nanowires is shown in Fig. 7. While we do not have exact data on the initialindividual nanowire diameters that were measured, based on pre-PECVD diameter statistics we estimate that the deposition rate of the silicon oxide layers varies from 15 to 35 nm/ min along the nanowires length. Deposition of silicon oxide on high-density silicon nanowires arrays shows features different from those noted above. The measured lms are thinner and the value for the slope is less than that of the low-density wires. Figure 8 shows typical SEM micrographs from the high-density arrays. Figure 9 contains higher magnication images showing that at the bottom of the array there may be regions that were not coated by the PECVD oxide; indeed, it is estimated, based on morphological observations, that the bottom 25 microns of the wires were not coated. Since the wires compared here are of considerably different lengths, 6 lm and 22 lm for the low and high density wires, respectively, only the top portions of the longer wires should be used to compare with the shorter low-density wires. Analysis of the slope of the coatings on the high-density NW arrays in this

Taper

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Fig. 8 SEM images of high-density Si NW arrays coating with silicon oxide by PECVD using the conditions in runs 16 (af, respectively). Note the magnication is not the same for Fig. 9 SEM images of the (a) top and (b) bottom regions of high-density Si NW arrays coated using run #1. The magnication bar for each image is for 1 micron

all images. The magnication bar for each image is for 2 microns except for images (a) and (b) for which it is 10 microns

region reveals that the slope is approximately an order of magnitude lower than for the low-density arrays (Fig. 10). Also there is little variation in taper of the oxide coating with nanowire length; the variation observed in Fig. 10 is within the experimental error of *15%. Clearly, the higher-density wires, with smaller diameters and greater length, have a strong impact on the transport of excited reactant species within the NW array and subsequent lm deposition on the nanowire sidewalls. The total nanowire thickness (Si NW plus oxide coating) as a function of position along the high-density nanowires is shown in Fig. 11. Based on estimates from prePECVD deposition NW diameter statistics, the deposition rate varies from 0 to 35 nm/min, though

this is distributed more uniformly along the upper regions of the longer nanowires. Once again, the effect of pressure dominates the observed taper in the high-density NW arrays, giving the lowest values. The global change in oxide thickness was also determined as a function of both pressure and temperature (Fig. 12). It was indeed found that the total average slope was lowest at higher pressures and at higher temperatures. These trends were held true for both low and high-density arrays. In order to understand the mechanisms associated with the observed processing trends, we analyze the key factors that may inuence the PECVD lm uniformity. According to our results, the pressure,

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0.3 0.25 0.2 SiO2-1 HD SiO2-2 HD SiO2-3 HD SiO2-4 HD SiO2-5 HD SiO2-6 HD

961
Precursor flow Cb
Precursor radical velocity

plasma boundary layer

Precursor diffusion Reaction product diffusion flow coefficient

Taper

C (x,y,z)
Reaction rate constant & sticking coefficient

0.15 0.1 0.05 0

5000

10000

15000

20000

25000

Position from NW base (nm)

Fig. 10 Silicon oxide slope for various deposition conditions on high-density nanowire arrays

Fig. 13 Schematic of the structure considered and the key parameters inuencing PECVD oxide deposition. A threedimensional model is under development to fully determine the impact of nano-array structural parameters on deposition

1000 900 800

Diameter (nm)

700 600 500 400 300 200 100 0 0

SiO2-1 HD SiO2-2 HD SiO2-3 HD SiO2-4 HD SiO2-5 HD SiO2-6 HD

5000

10000

15000

20000

25000

Position from NW base (nm)

Fig. 11 Total diameter (nanowire + oxide coating) for various deposition conditions on high-density nanowire arrays

Slope (Delta Thickness / Wire Leng)

0.1 0.09 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0 400 LD-200C LD-370C HD-200C HD-370C 600 800 1000 1200 1400 1600

Deposition Pressure (mtorr)

Fig. 12 Mean slope of the oxide coating (total change in thickness/nanowire length) on low and high-density nanowire arrays as a function of pressure for two different temperatures

temperature, and array density are major parameters to be considered. Figure 13 shows a model of the structures explored and key features. It is assumed that the factors inuencing deposition within the

inverse structure, namely within nanochannels of a template array (Lew and Redwing 2003), are similar to the nanowire array structure. Pressure effects play a dominant, yet somewhat counterintuitive, role in the deposition process. Assuming classical diffusion principles the pressure has an inverse effect on the diffusion rate constant and therefore the concentration of gas phase reactant species at the bottom of the wires should decrease with increasing pressure (Plawsky 2001). In plasma deposition, there is some concentration gradient of neutral species, however, the majority of reactive species are charged molecules that gain momentum by the alternating AC-eld. Therefore, classical diffusion principles do not directly apply. A more detailed analysis considering the ux of reactive species impinging on the surface is required to explain our results. For a given temperature the number of impinging molecules that strike the surface is directly proportional to the operating pressure (Maissel and Glang 1970). During the deposition process the density of adatoms on the surface is related to the molecular impingement rate, the absorption and desorption rates, and the sticking coefcient. The sticking coefcient accounts for the fraction of atoms that do not adsorb on the surface. It generally depends on the fraction of surface sites covered with the adsorbed species, the gas and surface temperatures, as well as surface features such as roughness, defect sites, and exposed bonds or vacancies (Lieberman and Lichtenberg 1994). We postulate that the increased pressure changes the makeup and energy of the plasma gas phase species. It is

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known that the sticking coefcient changes with gas species, where even changing the concentration of one particular species may affect the ability of atoms to diffuse along the wire length. The mean free path is inversely proportional to the gas pressure where it is assumed that additional atomic collisions are largely responsible for the change in plasma behavior (Maissel and Glang 1970). In this way the pressure likely changes the surface chemistry by increasing surface diffusion as well as decreasing the sticking coefcients of reactive species, which may assist in yielding a more uniform oxide deposition along the wire length. The temperature is also a critical control parameter because the sticking coefcients typically decrease with increasing temperature. This is evident in the data presented above, where the increased temperature yields a more uniform coating along the wire length, since there is greater probability for molecules to leave the surface and diffuse or drift (in the local electric eld) to other locations of the nanowire. The least signicant factor affecting the coating uniformity is the nanowire array density. One potential explanation for this relates again to the sticking coefcient. SEM and TEM observations generally show that the surface morphology of Si nanowires in the low-density nanowire arrays is more faceted and they contain a higher concentration of gold particles on the surface compared to nanowires in the high-density arrays. We hypothesize that these provide additional defect sites that effectively increase the sticking coefcients, especially near the top of the wires as seen by the large increase in taper at their tips. As such, a balance between temperature and pressure is required to allow transport of species through the interstices of the array with uniform reaction on the sidewalls. More detailed calculations are required to better quantify these relationships and optimize the growth parameters, while also taking into account the impact of activated species created in the plasma environment. Additional studies correlating the surface defect structure of nanowires in the low and high density arrays to the observed lm thickness taper will help to further shed light on the mechanisms underlying the deposition of activated species on nanowire/tube arrays by PECVD. Finally, a potential problem with PECVD processing of nanowires is the potential for damage of the wire surfaces by the plasma. However, we note that nanowires processed with PECVD have been

observed by transmission electron microscopy (TEM) in our lab (data not shown) and no obvious damage to the nanowires has been observed. Indeed, deposition of thin lms on Si has been widely reported with minimal damage to the Si surface, e.g., PECVD lms are typically used to passivate surface states on single crystal Si (Aberle 2000).

Conclusions In conclusion, the deposition of silicon oxide lms on silicon nanowire arrays using plasma-enhanced chemical vapor deposition has been studied with respect to process uniformity. The effect of pressure, temperature, and nanowire array density on the coating uniformity as a function of position along the nanowire length was quantied. It was observed that higher pressure and higher temperatures lead to a more uniform coating. Higher density arrays lead to both a smaller gradient in the coating thickness with NW length, as well as a more uniform change of the gradient with length. For long nanowire arrays (*22 microns), the PECVD does not deposit near the base of the nanowires. This work shows that PECVD deposition on NW/NT is dependent not only on the PECVD process parameters, but also on the nature of the array being coated. A more thorough mechanistic understanding, particularly as relates to precursor transport within the arrays, coupled with experimental optimization of the process, is required to achieve better control of the deposition rates and thickness uniformity. The use of PECVD to coat nanowire arrays with silicon oxide and other materials is shown to be a viable candidate for future nanomanufacturing of materials and devices using such structures.
Acknowledgments The authors wish to thank T. Vandenbriel and S. Klopman for technical support with the nanowire growth and PECVD deposition and B.A. Korevaar, G. Dalakos, R.R. Corderman and R. Rohling for helpful discussions.

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