Code No: R05220202
Set No. 1
II B.Tech II Semester Supplimentary Examinations, Aug/Sep 2008
LINEAR AND DIGITAL IC APPLICATONS
( Common to Electrical & Electronic Engineering and Instrumentation &
Control Engineering)
Time: 3 hours
Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
\u22c6 \u22c6 \u22c6 \u22c6 \u22c6
1. (a) What is an Op-amp? Why it is called so?
(b) Explain the parameters that should be considered for ac and dc applications
of an Op-amp?
(c) Draw and explain the two open loop Op-amp con\ufb01gurations with neat circuit
diagram.
[4+5+7]
2. (a) What is an instrumentation ampli\ufb01er? Explain and list any three applications
of the instrumentation ampli\ufb01er.
(b) Describe the application of Op-amp combines with a PN junction diode.[10+6]
3. (a) Draw the I order/II order band pass \ufb01lter circuit with its frequency response
curve. Explain its working.
(b) Derive the expression for the transfer function of second order High pass \ufb01lter.
[8+8]
4. (a) Draw the dc voltage versus phase di\ufb00erence characteristic of balanced modu-
lator phase detector of a PLL indicating all important regions.
(b) Draw the dc out put voltage of VCO versus frequency characteristic of a PLL
indicating the capture and lock range clearly.
(c) State the relationship between lock range and capture range through a math-
ematical expression.
[6+6+4]
5. (a) List important speci\ufb01cations and characteristics of a monolithic Digital to
Analog converter IC MC1408.
(b) Explain the operation of an 8-bit tracking type Analog to Digital converter.
(c) Compare the conversion times and e\ufb03ciencies of 8-bit tracking type and suc-
cessive approximation type Analog to Digital converters.
[5+7+4]
6. (a) Draw the circuit diagram of basic TTL NAND gate and explain the three
parts with the help of functional operation?
(b) List out TTL families and compare them with reference to propagation delay,
power consumption, speed-power product and low level input current? [8+8]
7. (a) Using two 74\u00d7138 decoders design a 4 to 16 decoder?
(b) Design a CMOS transistor circuit that has the functional behaviorF (Z) =
(A +\u00af
B)(B+ C).
[8+8]
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