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Table Of Contents

Contents
1 Overview
2 Interface Signals
2.2 Signaling Technology
3 Logic Symbol Diagram
Data
4 Power Management
4.1 Power Management States
4.2 Connect and Disconnect Protocol
Figure 5. Exiting Stop Grant State/Bus Reconnect Sequence
Connect State Diagram
4.3 Clock Control
5 Thermal Design
Table 1.Thermal Design Power
6 CPUID Support
Table 7.Absolute Ratings
7.9 VCC_CORE Voltage and Current
Table 8.VCC_CORE Voltage and Current
7.10 SYSCLK and SYSCLK# AC and DC Characteristics
Table 9.SYSCLK and SYSCLK# DC Characteristics
Table 10.SYSCLK and SYSCLK# AC Characteristics
7.11 AMDAthlon™ System Bus AC and DC Characteristics
Table 11.AMDAthlon™ System Bus DC Characteristics
Table 12.AMDAthlon™ System Bus AC Characteristics
7.12 General AC and DC Characteristics
Table 13.General AC and DC Characteristics
7.13 APIC Pins AC and DC Characteristics
Table 14.APIC Pins AC and DC Characteristics
8 Signal and Power-Up Requirements
8.1 Power-Up Requirements
Signal Sequence and Timing Description
Figure 10. Signal Relationship Requirements During Power-Up Sequence
Clock Multiplier Selection (FID[3:0])
Serial Initialization Packet (SIP) Protocol
8.2 Processor Warm Reset Requirements
9 Mechanical Data
Table 15.CPGA Mechanical Loading
Table 16.Dimensions for the AMDAthlon™ Processor Model 4 CPGA Package
Figure 11. AMDAthlon™ Processor Model 4 CPGA Package
10 Pin Descriptions
10.1 Pin Diagram and Pin Name Abbreviations
Topside View
Bottomside View
Table 17.Pin Name Abbreviations
Table 18.Cross-Reference by Pin Location
10.2 Pin List
10.3 Detailed Pin Descriptions
COREFB and COREFB# Pins
DBRDY and DBREQ# Pins
Table 19.FID[3:0] Clock Multiplier Encodings
K7CLKOUT and K7CLKOUT# Pins
PLL Bypass and Test Pins
SADDIN[1:0]# and SADDOUT[1:0]# Pins
SYSCLK and SYSCLK# Pins
Table 20.VID[4:0] Code to Voltage Definition
Standard AMDAthlon™ Processor Model 4 Products
Figure 14. PGA OPN Example for the AMDAthlon™ Processor Model 4
Abbreviations and Acronyms
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Published by Ruxandra Trandafir
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Categories:Types, Brochures
Published by: Ruxandra Trandafir on Jan 28, 2014
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01/28/2014

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