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Introduction to Deep Submicron Cmos Devicw Tech & Its Impact on Ckt Design

Introduction to Deep Submicron Cmos Devicw Tech & Its Impact on Ckt Design

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Published by harishsharma1988

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Categories:Types, Research, Science
Published by: harishsharma1988 on Oct 10, 2009
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12/24/2012

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Slide 1Loke, Wee & PfiesterAgilent Technologies
Introduction to Deep SubmicronCMOS Device Technology& Its Impact on Circuit Design
Alvin L.S.Loke, Tin Tin Wee & James R. PfiesterAgilent Technologies, Fort Collins, COIEEE Solid-State Circuits SocietyDecember 8, 2004
 
Slide 2Loke, Wee & PfiesterAgilent Technologies
Outline
CMOS Technology TrendsMOSFET BasicsDeep Submicron FET Fabrication SequenceEnabling TechnologiesSecond-Order ConsequencesDealing with Process Variations in ManufacturingConclusions
Disclaimer
A proper
introduction 
alone would take weeks,let alone a whole semesterNeed to omit lots ofnitty-gritty yet important processdetailsHopefully, we’ll still learn lots of
cool 
device physics

 
Slide 3Loke, Wee & PfiesterAgilent Technologies
Source: Thompson
et al 
., Intel (2002)
Where is CMOS Technology Today?
Scaling is still alive & well130nm now standard fare90nm already in volume manufacturing65nm integration tough but not insurmountableSome key trends:Aggressive scaling of gate CD (critical dimension)Scaling driven by exclusively by digital circuit needs
Source: Wu
et al 
., TSMC (2002)
90nm Technology59nm59nm

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