Density Based Trafiic Control

DENSITY BASED TRAFFIC CONTROL SYSTEM
ABSTRACT
An adaptive traffic control system was developed where the traffic load is continuously measured by sensors connected to a microcontroller-based system which also performs all intersection control functions. Intersection controllers of an area are interconnected with a communication network through which traffic load and synchronization information is exchanged. As a result, the duration and relative phases of each traffic light cycle change dynamically. For the basic function of the system only the intersection controllers are re uired.
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.icrocontroller based traffic control system is an application specific pro/ect, which is used to control the traffic. An embedded system is developed which consists of a microcontroller, I& transmitter and receiver, 0%,1s $his pro/ect is implemented by placing I& transmitters, receivers and led1s at the 2 way /unction, the four paths are represented as &',&3,&4,&2
$ransmitters and receivers are placed at either sides of the four paths, and 2 led1s at corner of the /unction *hen there is a traffic along the paths,value of & would be 555 which are the values of I& sensors and if there is no traffic the value is '''
For instance,let the traffic at the path &' be initially ''' ie there is no traffic , when the traffic reaches the first sensor,the value of & would be 5'',if it reaches second sensor ,the value of & is 55',and then if it reaches the last sensor that is the third one,it is recognized that traffic is heavy and the led glows which indicates that vehicles can move forward,traffic is cleared, and the sensor values automatically changed to '''.the control goes to the next path wher the values of sensors contains more no of zeroes $his entire embedded system is placed at that /unction .icrocontroller is interfaced with led1s and ir sensors $he total no of I& sensors re uired are '3 and led1s 2 $herefore these are connected to any two ports of microcontroller
BLOCK DIAGRAM
AT !S"# MICRO CONTROLLER
IR TRANSMI TTER
IR RECIE(E R
LED
LCD REG&LAT ED %O'ER S&%%LY
BLOCK DIAGRAM DESCRII%TION
$he block diagram consists of microcontroller interfaced to regulated power supply, led and I& receiver and I& transmitter which consists of an I& sensor $he I& sensors and leds are connected to any of the port pins of microcontroller,regulated power supply is connected to the )cc pin of microcontroller which uses an voltage regulator to get 6 v of power supply. $he transmit pin of I& receiver is connected to the receive pin of microcontroller $his embedded system is placed at the 2 way /unction which controls the traffic electronically $he system uses a compact circuitry build around flash version of A$78963 .icrocontroller with a non-volatile memory. #rograms will be developed in %.:%,,%, ! language. F0A9" .A;I! is used for loading of programs into microcontroller.
IR TRANSMITTER and receiver $he purpose of the transmitter is to transform the information we want to send into a signal that can be propagated by the channel. In the case of our wired copper channel, this means we want the information to be transformed into a modulated voltage level, something like the pulse train. For a wireless channel, however, the
transmitter needs to encode the information onto an %. wave that can be easily propagated. I& $&A+9.I$$%&
$he I& transmitter part consists of an Infra red light emitting diode that can capable of sending modulated data within infra red band. $o match the receiver fre uency the the data is modulated at 47.< ="> by configuring 666 timer at astable mode of operation, which generates fre uency using the components &3 and !3 as shown in above fig. $his fre uency can be varied over a long range /ust by varying the preset &' and !'.
I& &%!%I)%&
$he I& receiver consists of $9(# '<47 module which is a simple yet effective I& proximity sensor built around the $9(# '<47 module. $he $9(# module is commonly found at the receiving end of an I& remote control system? e.g., in $)s, !, players etc. $hese modules re uire the incoming data to be modulated at a particular fre uency and would ignore any other I& signals. It is also immune to ambient I& light, so one can easily use these sensors outdoors or under heavily lit conditions. 9uch modules are available for different carrier fre uencies from 43 k"z 23k"z. In this particular proximity sensor, we will be generating a constant stream of s uare wave signal using I!666 centered at 47 k"z and would use it to drive an I& led. 9o whenever this signal bounces off the obstacles, the receiver would detect it to
and change its output. 9ince the $9(# '<47 module works in the active-low configuration, its output would normally remain high and would go low when it detects the signal @the obstacleA. :asically an ir sensor is used for detecting an obstacle, there are some areas where valuable things are placed, an I& transmitter and receiver is placed there, an infrared path is established and if any person comes into that path the buzzer gets on which gives out a long beep 9imilarly a fire sensor is used to detect fire $he sensed data is given to the microcontroller, processing is done according to the logic in the microcontroller and then writes onto ;9. which will further send sms to the mobile at the user A buzzer is interfaced to microcontroller to give out a beep sound whenever an obstacle and fire is detected
IR receiver )od*le TSO%
De+cription $he $9(#'<.. B series are miniaturized receivers for infrared remote control systems. #I+ diode and preamplifier are assembled on lead frame, the epoxy package is designed as I& filter. $he demodulated output signal can directly be decoded by a microprocessor. $9(#'<.. is the standard I& remote control receiver series, supporting all ma/or transmission codes.
Feat*re+ #hoto detector and preamplifier in one package Internal filter for #!. fre uency Improved shielding against electrical field disturbance $$0 and !.(9 compatibility (utput active low 0ow power consumption "igh immunity against ambient light !ontinuous data transmission possible @'355 bitCsA 9uitable burst length '5 cyclesCburst
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%.:%,,%, 9D9$%. An embedded system is a special-purpose computer system designed to perform one or a few dedicated functionsE'F, sometimes with real-time computing constraints. It is usually embedded as part of a complete device including hardware and mechanical parts. In contrast, a general-purpose computer, such as a personal computer, can do many different tasks depending on programming. %mbedded systems have become very important today as they control many of the common devices we use. 9ince the embedded system is dedicated to specific tasks, design engineers can optimize it, reducing the size and cost of the product, or increasing the reliability and performance. 9ome embedded systems are mass-produced, benefiting from economies of scale.
#hysically, embedded systems range from portable devices such as digital watches and .#4 players, to large stationary installations like traffic lights, factory controllers, or the systems controlling nuclear power plants. !omplexity varies from low, with a single microcontroller chip, to very high with multiple units, peripherals and networks mounted inside a large chassis or enclosure. In general, Gembedded systemG is not an exactly defined term, as many systems have some element of programmability. For example, "andheld computers share some elements with embedded systems H such as the operating systems and microprocessors which power them H but are not truly embedded systems, because they allow different applications to be loaded and peripherals to be connected. An embedded system is some combination of computer hardware and software, either fixed in capability or programmable, that is specifically designed for a particular kind of application device. Industrial machines, automobiles, medical e uipment, cameras, household appliances, airplanes, vending machines, and toys @as well as the more obvious cellular phone and #,AA are among the myriad possible hosts of an embedded system. %mbedded systems that are programmable are provided with a programming interface, and embedded systems programming is a specialized occupation. !ertain operating systems or language platforms are tailored for the embedded market, such as %mbeddedIava and *indows J# %mbedded. "owever, some lowend consumer products use very inexpensive microprocessors and limited storage, with the application and operating system both part of a single program. $he program is written permanently into the systemKs memory in this case, rather than
being loaded into &A. @random access memoryA, as programs on a personal computer are.
INTROD&CTION TO EMBEDDED SYSTEM *e are living in the %mbedded *orld. Dou are surrounded with many embedded products and your daily life largely depends on the proper functioning of these gadgets. $elevision, &adio, !, player of your living room, *ashing .achine or .icrowave (ven in your kitchen, !ard readers, Access !ontrollers, #alm devices of your work space enable you to do many of your tasks very effectively. Apart from all these, many controllers embedded in your car take care of car operations between the bumpers and most of the times you tend to ignore all these controllers. In recent days, you are showered with variety of information about these embedded controllers in many places. All kinds of magazines and /ournals regularly dish out details about latest technologies, new devices, fast applications which make you believe that your basic survival is controlled by these embedded products. +ow you can agree to the fact that these embedded products have successfully invaded into our world. Dou must be wondering about these embedded controllers or systems. *hat is this %mbedded 9ystemL
$he computer you use to compose your mails, or create a document or analyze the database is known as the standard desktop computer. $hese desktop computers are manufactured to serve many purposes and applications. Dou need to install the relevant software to get the re uired processing facility. 9o, these desktop computers can do many things. In contrast, embedded controllers carryout a specific work for which they are designed. .ost of the time, engineers design these embedded controllers with a specific goal in mind. 9o these controllers cannot be used in any other place. $heoretically, an embedded controller is a combination of a piece of microprocessor based hardware and the suitable software to undertake a specific task. $hese days designers have many choices in microprocessorsCmicrocontrollers. %specially, in 7 bit and 43 bit, the available variety really may overwhelm even an experienced designer. 9electing a right microprocessor may turn out as a most difficult first step and it is getting complicated as new devices continue to pop-up very often. In the 7 bit segment, the most popular and used architecture is IntelKs 754'. .arket acceptance of this particular family has driven many semiconductor manufacturers to develop something new based on this particular architecture. %ven after 36 years of existence, semiconductor manufacturers still come out with some kind of device using this 754' core.
MICROCONTROLLER In contrast to general-purpose !#-s, microcontrollers may not implement an external address or data bus as they integrate &A. and non-volatile memory on the same chip as the !#-. -sing fewer pins, the chip can be placed in a much smaller, cheaper package. Integrating the memory and other peripherals on a single chip and testing them as a unit increases the cost of that chip, but often results in decreased net cost of the embedded system as a whole. %ven if the cost of a !#- that has integrated peripherals is slightly more than the cost of a !#- M external peripherals, having fewer chips typically allows a smaller and cheaper circuit board, and reduces the labor re uired to assemble and test the circuit board. A microcontroller is a single integrated circuit, commonly with the following featuresN
central processing unit - ranging from small and simple 2-bit processors to complex 43- or O2-bit processors discrete input and output bits, allowing control or detection of the logic state of an individual package pin serial inputCoutput such as serial ports @-A&$sA other serial communications interfaces like IP!, 9erial #eripheral Interface and !ontroller Area +etwork for system interconnect peripherals such as timers, event counters, #*. generators, and watchdog volatile memory @&A.A for data storage &(., %#&(., E%%#&(.F or Flash memory for program and operating parameter storage
clock generator - often an oscillator for a uartz timing crystal, resonator or &! circuit many include analog-to-digital converters in-circuit programming and debugging support
$his integration drastically reduces the number of chips and the amount of wiring and #!: space that would be needed to produce e uivalent systems using separate chips. Furthermore, and on low pin count devices in particular, each pin may interface to several internal peripherals, with the pin function selected by software. $his allows a part to be used in a wider variety of applications than if pins had dedicated functions. .icrocontrollers have proved to be highly popular in embedded systems since their introduction in the '8<5s. 9ome microcontrollers use a "arvard architectureN separate memory buses for instructions and data, allowing accesses to take place concurrently. *here a "arvard architecture is used, instruction words for the processor may be a different bit size than the length of internal memory and registers? for exampleN '3-bit instructions used with 7-bit data registers. $he decision of which peripheral to integrate is often difficult. $he microcontroller vendors often trade operating fre uencies and system design flexibility against time-to-market re uirements from their customers and overall lower system cost. .anufacturers have to balance the need to minimize the chip size against additional functionality. .icrocontroller architectures vary widely. 9ome designs include general-purpose microprocessor cores, with one or more &(., &A., or IC( functions integrated onto the package. (ther designs are purpose built for control applications. A
microcontroller instruction set usually has many instructions intended for bit-wise operations to make control programs more compact. For example, a general purpose processor might re uire several instructions to test a bit in a register and branch if the bit is set, where a microcontroller could have a single instruction that would provide that commonly-re uired function. Microcontroller A )icrocontroller @also MC& or ,CA is a computer-on-a-chip. It is a type of microprocessor emphasizing high integration, low power consumption, selfsufficiency and cost-effectiveness, in contrast to a general-purpose microprocessor @the kind used in a #!A. In addition to the usual arithmetic and logic elements of a general purpose microprocessor, the microcontroller typically integrates additional elements such as read-write memory for data storage, read-only memory, such as flash for code storage, %%#&(. for permanent data storage, peripheral devices, and inputCoutput interfaces. At clock speeds of as little as a few ."z or even lower, microcontrollers often operate at very low speed compared to modern day microprocessors, but this is ade uate for typical applications. $hey consume relatively little power @milliwattsA, and will generally have the ability to sleep while waiting for an interesting peripheral event such as a button press to wake them up again to do something. #ower consumption while sleeping may be /ust nano watts, making them ideal for low power and long lasting battery applications. .icrocontrollers are fre uently used in automatically controlled products and devices, such as automobile engine control systems, remote controls, office machines, appliances, power tools, and toys. :y reducing the size, cost, and power consumption compared to a design using a separate microprocessor, memory, and
inputCoutput devices, microcontrollers make it economical to electronically control many more processes.
MICROCONTROLLER (ERS&S MICRO%ROCESSOR *hat is the difference between a .icroprocessor and .icrocontrollerL :y microprocessor is meant the general purpose .icroprocessors such as IntelKs J7O family @757O, 7537O, 7547O, 7527O, and the #entiumA or .otorolaKs O75J5 family @O7555, O75'5, O7535, O7545, O7525, etcA. $hese microprocessors contain no
&A., no &(., and no IC( ports on the chip itself. For this reason, they are commonly referred to as general-purpose .icroprocessors. A system designer using a general-purpose microprocessor such as the #entium or the O7525 must add &A., &(., IC( ports, and timers externally to make them functional. Although the addition of external &A., &(., and IC( ports makes these systems bulkier and much more expensive, they have the advantage of versatility such that the designer can decide on the amount of &A., &(. and IC( ports needed to fit the task at hand. $his is not the case with .icrocontrollers. A .icrocontroller has a !#- @a microprocessorA in addition to a fixed amount of &A., &(., IC( ports, and a timer all on a single chip. In other words, the processor, the &A., &(., IC( ports and the timer are all embedded together on one chip? therefore, the designer cannot add any external memory, IC( ports, or timer to it. $he fixed amount of on-chip &(., &A., and number of IC( ports in .icrocontrollers makes them ideal for many applications in which cost and space are critical. In many applications, for example a $) remote control, there is no need for the computing power of a 27O or even an 757O microprocessor. $hese applications most often re uire some IC( operations to read signals and turn on and off certain bits. MICROCONTROLLERS FOR EMBEDDED SYSTEMS In the 0iterature discussing microprocessors, we often see the term %mbedded 9ystem. .icroprocessors and .icrocontrollers are widely used in embedded system products. An embedded system product uses a microprocessor @or .icrocontrollerA to do one task only. A printer is an example of embedded system
since the processor inside it performs one task only? namely getting the data and printing it. !ontrast this with a #entium based #!. A #! can be used for any number of applications such as word processor, print-server, bank teller terminal, )ideo game, network server, or Internet terminal. 9oftware for a variety of applications can be loaded and run. of course the reason a pc can perform myriad tasks is that it has &A. memory and an operating system that loads the application software into &A. memory and lets the !#- run it. In an %mbedded system, there is only one application software that is typically burned into &(.. An x7O #! contains or is connected to various embedded products such as keyboard, printer, modem, disk controller, sound card, !,-&(. drives, mouse, and so on. %ach one of these peripherals has a .icrocontroller inside it that performs only one task. For example, inside every mouse there is a .icrocontroller to perform the task of finding the mouse position and sending it to the #!. $able '-' lists some embedded products. Intel-+ ./0 Arc1itect*re$he generic 754' architecture sports a "arvard
architecture, which contains two separate buses for both program and data. 9o, it has two distinctive memory spaces of O2= J 7 size for both program and data. It is based on an 7 bit central processing unit with an 7 bit Accumulator and another 7 bit : register as main processing blocks. (ther portions of the architecture include few 7 bit and 'O bit registers and 7 bit memory locations. %ach 754' device has some amount of data &A. built in the device for internal processing. $his area is used for stack operations and temporary storage of data.
$his base architecture is supported with onchip peripheral functions like IC( ports, timersCcounters, versatile serial communication port. 9o it is clear that this 754' architecture was designed to cater many real time embedded needs. $he following list gives the features of the 754' architectureN (ptimized 7 bit !#- for control applications. %xtensive :oolean processing capabilities. O2= #rogram .emory address space. O2= ,ata .emory address space. '37 bytes of onchip ,ata .emory. 43 :i-directional and individually addressable IC( lines. $wo 'O bit timerCcounters. Full ,uplex -A&$. O-source C 6-vector interrupt structure with priority levels. (nchip clock oscillator.
+ow you may be wondering about the non mentioning of memory space meant for the program storage, the most important part of any embedded controller. (riginally this 754' architecture was introduced with onchip, Kone time programmableK version of #rogram .emory of size 2= J 7. Intel delivered all these microcontrollers @756'A with userKs program fused inside the device.
."0 DERI(ATI(ES Along the way, this 754' architecture gained enviable market acceptance. .any semiconductor manufacturers started either manufacturing the 754' devices as such @Intel was liberal in giving away license to whoever askedA or developing a new kind of microcontrollers based on 754' core architecture..anufacturers modified the basic 754' architecture and added many new peripheral functions to make them attractive to the designers. :ecause of the rush, electronic community started getting a variety of 754' based devices with range of options. $o beat the competition, manufacturers developed different microcontrollers with many uni ue features. $hese parts are popularly known as K754' ,erivativesK. Almost every decent manufacturer boasted of having an 754' based microcontroller in the line card. First ma/or manufacturer was the #hilips who brought out more than 25-65 derivatives with a variety of IC( options, memory combinations, and peripheral functions. ,evices became available in regular ,I# and 9., packages. *ith the basic 754' core, #hilips ported high capacity #rogram .emory @upto 43=CO2=A, its patented I3! interface bus, 7C'5 bit Analog to ,igital !onverters, !A+ :us, !apture and !ompare registers, *atch dog timer, #*. facilities and etc. .ore IC( ports @as many as eight portsA, additional timerCcounter, second serial port was also made available in #hilips devices. Apart from all these, #hilips developed many consumer devices meant for telecom, computer and $) applications. A smart card controller was also developed by incorporating a cryptographic engine. 9o #hilips clearly established itself as the market leader in 754' derivatives and still caters to this segment.
$hen came ,allas semiconductor. ,allas redesigned the 754' architecture and eliminated waste clock cycles of original core and made all instructions executed in less clock cycles @maximum of 2A which has traditionally taken upto '3 clock cycles. 9o, came the birth of "igh speed 754' ,erivatives. ,allas also maintained the same device pin out configurations to enable the user get upto 4J performance by replacing slower parts with a ,allas device. 9o, existing compiled code started running faster without any modification. $hese days, you can find ,allas devices giving upto 65 .I#9 @.illion Instructions #er 9econdA.
Apart from this, ,allas introduced additional 9erial port, *atch ,og $imer, #recision &eset !ircuitry, &eal $ime !lock, #ower Fail .onitor in the 754' devices. Also a second data pointer, more onchip &A. space and more interrupt lines were also made available. ,allas semiconductor also has got a range of secure microcontrollers based on 754' core. $his microcontroller family uses non volatile &A. to keep both program and data. :ecause of this &A., the controller gives the In 9ystem &eprogrammability. ,allas has combined this microcontroller, 9&A. and lithium cell in a single pack. $his device guarantees '5M years of data retention in the &A. area. $his 754' also boasts the tamper proof security features like &eal $ime .emory %ncryption, user selected 27 bit %ncryption key, memory contents, security lock and the facility to hide interrupt vector table. As you can agree, this particular 754' device has found a niche market in banking and security related applications.
Atmel !orporation is the another ma/or semiconductor manufacturer who introduced many flash memory based 754' derivatives at a competitive cost. Atmel used its expertise in flash memory technology into the basic 754' core and brought out microcontrollers with a variety of flash memory options and few devices also carry In 9ystem &eprogramming facility. Dou can programCreprogram this microcontroller after soldering the device in the target board. If this programming facility is embedded in the system software, then the tasks like remote calibration, onsite system upgradation become as easy as sending your dataCprogram in a floppy disk or by internet. Atmel devices sport security lock to its flash memory to protect the contents from the prying eyes. .eantime, Intel itself tried to cash in the popularity of this 754' architecture and introduced improved versions of microcontrollersN 75'6' and 7536' families. $hese devices sport 'O bit architecture using 754' core and unfortunately these devices have not become as popular as 754'.%ven after many years of introduction, 754' core is still going strong in 7 bit arena.
%IN DIAGRAM OF GENERAL %&R%OSE MICROCONTROLLER
ALE/PROG: Address 0atch %nable output pulse for latching the low byte of the address during accesses to external memory. A0% is emitted at a constant rate of 'CO of the oscillator fre uency, for external timing or clocking purposes, even when there are no accesses to external memory. @"owever, one A0% pulse is skipped during each access to external ,ata .emory.A $his pin is also the program pulse input @#&(;A during %#&(. programming. PSEN: #rogram 9tore %nable is the read strobe to external #rogram .emory. *hen the device is executing out of external #rogram .emory, #9%+ is activated twice each machine cycle @except that two #9%+ activations are skipped during
accesses to external ,ata .emoryA. #9%+ is not activated when the device is executing out of internal #rogram .emory. EA/VPP: *hen %A is held high the !#- executes out of internal #rogram .emory @unless the #rogram !ounter exceeds 5FFF" in the 75!6'A. "olding %A low forces the !#- to execute out of external memory regardless of the #rogram !ounter value. In the 75!4', %A must be externally wired low. In the %#&(. devices, this pin also receives the programming supply voltage @)##A during %#&(. programming. XTAL1: Input to the inverting oscillator amplifier. XTAL2: (utput from the inverting oscillator amplifier. Port 0: #ort 5 is an 7-bit open drain bidirectional port. As an open drain output port, it can sink eight 09 $$0 loads. #ort 5 pins that have 's written to them float, and in that state will function as high impedance inputs. #ort 5 is also the multiplexed low-order address and data bus during accesses to external memory. In this application it uses strong internal pullups when emitting 's. #ort 5 emits code bytes during program verification. In this application, external pullups are re uired. Port 1: #ort ' is an 7-bit bidirectional IC( port with internal pullups. #ort ' pins that have 's written to them are pulled high by the internal pullups, and in that state can be used as inputs. As inputs, port ' pins that are externally being pulled low will source current because of the internal pullups. Port 2: #ort 3 is an 7-bit bidirectional IC( port with internal pullups. #ort 3 emits the high-order address byte during accesses to external memory that use 'O-bit addresses. In this application, it uses the strong internal pullups when emitting 's.
Port 3: . #ort 4 is an 7-bit bidirectional IC( port with internal pullups. It also serves the functions of various special features of the 75!6' Family as followsN #ort #in Alternate Function #4.5- &x, @serial input portA #4.' -$x, @serial output portA #4.3 -I+$5 @external interrupt 5A #4.4- I+$' @external interrupt 'A #4.2 -$5 @timer 5 external inputA #4.6 -$' @timer ' external inputA #4.O -*& @external data memory write strobeA #4.< -&, @external data memory read strobeA )!!N -9upply voltage )99N -!ircuit ground potential All four ports in the 75!6' are bidirectional. %ach consists of a latch @9pecial Function &egisters #5 through #4A, an output driver, and an input buffer. $he output drivers of #orts 5 and 3, and the input buffers of #ort 5, are used in accesses to external memory. In this application, #ort 5 outputs the low byte of the external memory address, time-multiplexed with the byte being written or read. #ort 3 outputs the high byte of the external memory address when the address is 'O bits wide. (therwise, the #ort 3 pins continue to emit the #3 9F& content.
All the #ort 4 pins are multifunctional. $hey are not only port pins, but also serve the functions of various special features as listed belowN #ort #in Alternate Function #4.5 &x, @serial input portA #4.' $x, @serial output portA #4.3 I+$5 @external interruptA #4.4 I+$' @external interruptA #4.2 $5 @$imerC!ounter 5 external inputA #4.6 $' @$imerC!ounter ' external inputA #4.O *& @external ,ata .emory write strobeA #4.< &, @external ,ata .emory read strobeA MEMORY ORGANISATION $he alternate functions can only be activated if the corresponding bit latch in the port 9F& contains a '. (therwise the port pin remains at 5.All 75!6' devices have separate address spaces for program and data memory, as shown in Figures ' and 3. $he logical separation of program and data memory allows the data memory to be accessed by 7-bit addresses, which can be uickly stored and manipulated by an 7-bit !#-. +evertheless, 'O-bit data memory addresses can also be generated through the ,#$& register.
#rogram memory @&(., %#&(.A can only be read, not written to. $here can be up to O2k bytes of program memory. In the 75!6', the lowest 2k bytes of program are on-chip. In the &(.less versions, all program memory is external. $he read strobe for external program memory is the #9%+ @program store enableA. ,ata .emory @&A.A occupies a separate address space from #rogram .emory. In the 75!6', the lowest '37 bytes of data memory are on-chip. -p to O2k bytes of external &A. can be addressed in the external ,ata .emory space. In the &(.less version, the lowest '37 bytes are on-chip. $he !#- generates read and write signals, &, and *&, as needed during external ,ata .emory accesses. %xternal #rogram .emory and external ,ata .emory may be combined if desired by applying the &, and #9%+ signals to the inputs of an A+, gate and using the output of the gate as the read strobe to the external #rogramC,ata memory. :A9I! &%;I9$%&9 A number of 7563 registers can be considered Gbasic.G )ery little can be done without them and a detailed explanation of each one is warranted to make sure the reader understands these registers before getting into more complicated areas of development. The Accumulator If youKve worked with any other assembly language you will be familiar with the concept of an accumulator register. $he Accumulator, as its name suggests, is used as a general register to accumulate the results of a large number of instructions. It can hold an 7-bit @'-byteA value and is the most versatile register the 7563 has due to the sheer number of instructions that make use of the accumulator. .ore than half of the 7563Ks 366 instructions manipulate or use the Accumulator in some way. For example, if you want to add
the number '5 and 35, the resulting 45 will be stored in the Accumulator. (nce you have a value in the Accumulator you may continue processing the value or you may store it in another register or in memory. The "R" Re !"ter" $he G&G registers are sets of eight registers that are named &5, &', through &<. $hese registers are used as auxiliary registers in many operations. $o continue with the above example, perhaps you are adding '5 and 35. $he original number '5 may be stored in the Accumulator whereas the value 35 may be stored in, say, register &2. $o process the addition you would execute the commandN A,, A,&2 After executing this instruction the Accumulator will contain the value 45. Dou may think of the G&G registers as very important auxiliary, or GhelperG, registers. $he Accumulator alone would not be very useful if it were not for these G&G registers. $he G&G registers are also used to store values temporarily. For example, letQs say you want to add the values in &' and &3 together and then subtract the values of &4 and &2. (ne way to do this would beN .() A,&4 A,, A,&2 .() &6,A .() A,&' ?.ove the value of &4 to accumulator ?Add the value of &2 ?9tore the result in &6 ?.ove the value of &' to Acc
A,, A,&3 9-:: A,&6
?Add the value of &3 with A ?9ubtract the &6 @which has &4M&2A
As you can see, we used &6 to temporarily hold the sum of &4 and &2. (f course, this isnKt the most efficient way to calculate @&'M&3A - @&4 M&2A but it does illustrate the use of the G&G registers as a way to store values temporarily. As mentioned earlier, there are four sets of G&G registers-register bank 5, ', 3, and 4. *hen the 7563 is first powered up, register bank 5 @addresses 55h through 5<hA is used by default. In this case, for example, &2 is the same as Internal &A. address 52h. "owever, your program may instruct the 7563 to use one of the alternate register banks? i.e., register banks ', 3, or 4. In this case, &2 will no longer be the same as Internal &A. address 52h. For example, if your program instructs the 7563 to use register bank ', register &2 will now be synonymous with Internal &A. address 5!h. If you select register bank 3, &2 is synonymous with '2h, and if you select register bank 4 it is synonymous with address '!h. $he concept of register banks adds a great level of flexibility to the 7563, especially when dealing with interrupts @weKll talk about interrupts laterA. "owever, always remember that the register banks really reside in the first 43 bytes of Internal &A.. The # Re !"ter $he G:G register is very similar to the Accumulator in the sense that it may hold an 7-bit @'-byteA value. $he G:G register is only used implicitly by two 7563 instructionsN .-0 A: and ,I) A:. $hus, if you want to uickly and easily multiply or divide A by another number, you may store the other number in G:G and make use of these two instructions.
Aside from the .-0 and ,I) instructions, the G:G register are often used as yet another temporary storage register much like a ninth G&G register. The Pro ram $ou%ter $he #rogram !ounter @#!A is a 3-byte address that tells the 7563 where the next instruction to execute is found in memory. *hen the 7563 is initialized #! always starts at 5555h and is incremented each time an instruction is executed. It is important to note that #! isnKt always incremented by one. 9ince some instructions are 3 or 4 bytes in length the #! will be incremented by 3 or 4 in these cases. $he #rogram !ounter is special in that there is no way to directly modify its value. $hat is to say, you canKt do something like #!R3245h. (n the other hand, if you execute 0I.# 3245h youKve effectively accomplished the same thing. It is also interesting to note that while you may change the value of #! @by executing a /ump instruction, etc.A there is no way to read the value of #!. $hat is to say, there is no way to ask the 7563 G*hat address are you about to executeLG As it turns out, this is not completely trueN $here is one trick that may be used to determine the current value of #!. $his trick will be covered in a later chapter.
The &ata Po!%ter $he ,ata #ointer @,#$&A is the 7563Qs only user-accessible 'Obit @3-byteA register. $he Accumulator, G&G registers, and G:G register are all '-byte values. $he #! /ust described is a 'O-bit value but isnKt directly user-accessible as a working register.
,#$&, as the name suggests, is used to point to data. It is used by a number of commands that allow the 7563 to access external memory. *hen the 7563 accesses external memory it accesses the memory at the address indicated by ,#$&. *hile ,#$& is most often used to point to data in external memory or code memory, many developers take advantage of the fact that itKs the only true 'O-bit register available. It is often used to store 3-byte values that have nothing to do with memory locations. The Stac' Po!%ter $he 9tack #ointer, like all registers except ,#$& and #!, may hold an 7-bit @'-byteA value. $he 9tack #ointer is used to indicate where the next value to be removed from the stack should be taken from. *hen you push a value onto the stack, the 7563 first increments the value of 9# and then stores the value at the resulting memory location. *hen you pop a value off the stack, the 7563 returns the value from the memory location indicated by 9#, and then decrements the value of 9#. $his order of operation is important. *hen the 7563 is initialized 9# will be initialized to 5<h. If you immediately push a value onto the stack, the value will be stored in Internal &A. address 57h. $his makes sense taking into account what was mentioned two paragraphs aboveN First the 756' will increment the value of 9# @from 5<h to 57hA and then will store the pushed value at that memory address @57hA. ADDRESSING MODES $he addressing modes in the 75!6' instruction set are as followsN
&!rect A((re""!% In direct addressing the operand is specified by an 7-bit address field in the instruction. (nly internal ,ata &A. and 9F&s can be directly addressed. )%(!rect A((re""!% In indirect addressing the instruction specifies a register
which contains the address of the operand. :oth internal and external &A. can be indirectly addressed. $he address register for 7-bit addresses can be &5 or &' of the selected bank, or the 9tack #ointer. $he address register for 'O-bit addresses can only be the 'O-bit Sdata pointerT register, ,#$&. Re2i+ter In+tr*ction+ $he register banks, containing registers &5 through &<, can be accessed by certain instructions which carry a 4-bit register specification within the opcode of the instruction. Instructions that access the registers this way are code efficient, since this mode eliminates an address byte. *hen the instruction is executed, one of the eight registers in the selected bank is accessed. (ne of four banks is selected at execution time by the two bank select bits in the #9*. Re !"ter*S+ec!,!c )%"truct!o%" 9ome instructions are specific to a certain register. For example, some instructions always operate on the Accumulator, or ,ata #ointer, etc., so no address byte is needed to point to it. $he opcode itself does that. Instructions that refer to the Accumulator as A assemble as accumulator specific opcodes. Immediate !onstants $he value of a constant can follow the opcode in #rogram .emory. U For example, .() A, V'55
loads the Accumulator with the decimal number '55. $he same number could be specified in hex digits as O2". )%(e-e( A((re""!% (nly program .emory can be accessed with indexed addressing, and it can only be read. $his addressing mode is intended for reading look-up tables in #rogram .emory A 'O-bit base register @either ,#$& or the #rogram !ounterA points to the base of the table, and the Accumulator is set up with the table entry number. $he address of the table entry in #rogram .emory is formed by adding the Accumulator data to the base pointer. Another type of indexed addressing is used in the Scase /umpT instruction. In this case the destination address of a /ump instruction is computed as the sum of the base pointer and the Accumulator dataW
C3A%TER /
AT !S"# MICROCONTROLLER
De+cription
$he A$78963 is a low-power, high-performance !.(9 7-bit microcontroller with 7= bytes of in system programmable Flash memory. $he device is manufactured using Atmel1s high-density nonvolatile memory technology and is compatible with the industry- standard 75!6' instruction set and pinout. $he on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. :y combining a versatile 7-bit !#- with insystem programmable Flash on a monolithic chip, the Atmel A$78963 is a powerful microcontroller which provides a highly-flexible and cost-effective solution to many embedded control applications.$he A$78963 provides the following standard featuresN 7= bytes of Flash, 36O bytes of &A., 43 IC( lines, *atchdog timer, two data pointers, three 'O-bit timerCcounters, a six-vector twolevel interrupt architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In addition, the A$78963 is designed with static logic for operation down to zero fre uency and supports two software selectable power saving modes. $he Idle .ode stops the !#- while allowing the &A., timerCcounters, serial port, and interrupt system to continue functioning. $he #ower-down mode saves the &A. contents but freezes the oscillator, disabling all other chip functions until the next interrupt or hardware reset.
Features X !ompatible with .!9-6'Y #roducts X 7= :ytes of In-9ystem #rogrammable @I9#A Flash .emory B %nduranceN '555 *riteC%rase !ycles
X 2.5) to 6.6) (perating &ange X Fully 9tatic (perationN 5 "z to 44 ."z X $hree-level #rogram .emory 0ock X 36O x 7-bit Internal &A. X 43 #rogrammable IC( 0ines X $hree 'O-bit $imerC!ounters X %ight Interrupt 9ources X Full ,uplex -A&$ 9erial !hannel X 0ow-power Idle and #ower-down .odes X Interrupt &ecovery from #ower-down .ode X *atchdog $imer X ,ual ,ata #ointer X #ower-off Flag X Fast #rogramming $ime X Flexible I9# #rogramming @:yte and #age .odeA
#in ,escription )!! 9upply voltage. ;+, ;round.
Port 0 #ort 5 is an 7-bit open drain bidirectional IC( port. As an output port, each pin can sinkeight $$0 inputs. *hen 's are written to port 5 pins, the pins can be used as highimpedance inputs.#ort 5 can also be configured to be the multiplexed low-order addressCdata bus during accesses to external program and data memory. In this mode, #5 has internal pull-ups. #ort 5 also receives the code bytes during Flash programming and outputs the code bytes during program verification. %xternal pull-ups are re uired during program verification. #ort ' #ort ' is an 7-bit bidirectional IC( port with internal pull-ups. $he #ort ' output buffers can sinkCsource four $$0 inputs. *hen 's are written to #ort ' pins, they are pulled high by the internal pull-ups and can be used as inputs. As inputs, #ort ' pins that are externally being pulled low will source current @II0A because of the internal pull-ups. In addition, #'.5 and #'.' can be configured to be the timerCcounter 3 external count input @#'.5C$3A and the timerCcounter 3 trigger input @#'.'C$3%JA, respectively, as shown in the following table. #ort ' also receives the low-order address bytes during Flash programming and verification.
Port 2 #ort 3 is an 7-bit bidirectional IC( port with internal pull-ups. $he #ort 3 output buffers can sinkCsource four $$0 inputs. *hen 's are written to #ort 3 pins,
they are pulled high by the internal pull-ups and can be used as inputs. As inputs, #ort 3 pins that are externally being pulled low will source current @II0A because of the internal pull-ups. #ort 3 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 'O-bit addresses @.()J Z ,#$&A. In this application, #ort 3 uses strong internal pull-ups when emitting 's. ,uring accesses to external data memory that use 7-bit addresses @.()J Z &IA, #ort 3 emits the contents of the #3 9pecial Function &egister. #ort 3 also receives the high-order address bits and some control signals during Flash programming and verification.
Port 3 #ort 4 is an 7-bit bidirectional IC( port with internal pull-ups. $he #ort 4 output buffers can sinkCsource four $$0 inputs. *hen 's are written to #ort 4 pins, they are pulled high by the internal pull-ups and can be used as inputs. As inputs, #ort 4 pins that are externally being pulled low will source current @II0A because of the pull-ups. #ort 4 receives some control signals for Flash programming and verification. #ort 4 also serves the functions of various special features of the A$78963, as shown in the following table.
&9$ &eset input. A high on this pin for two machine cycles while the oscillator is running resets the device. $his pin drives high for 87 oscillator periods after the *atchdog times out. $he ,I9&$( bit in 9F& A-J& @address 7%"A can be used to disable this feature. In the default state of bit ,I9&$(, the &%9%$ "I;" out feature is enabled. A0%C#&(; Address 0atch %nable @A0%A is an output pulse for latching the low byte of the address during accesses to external memory. $his pin is also the program pulse input @#&(;A during Flash programming. In normal operation, A0% is emitted at a constant rate of 'CO the oscillator fre uency and may be used for external timing or clocking purposes. +ote, however, that one A0% pulse is skipped during each access to external data memory. If desired, A0% operation can be disabled by setting bit 5 of 9F& location 7%". *ith the bit set, A0% is active only during a .()J or .()! instruction. (therwise, the pin is weakly pulled
high. 9etting the A0%-disable bit has no effect if the microcontroller is in external execution mode. PSEN #rogram 9tore %nable @#9%+A is the read strobe to external program memory.*hen the A$78963 is executing code from external program memory, #9%+ is activated twice each machine cycle, except that two #9%+ activations are skipped during each access to external data memory.
EA/VPP %xternal Access %nable. %A must be strapped to ;+, in order to enable the device to fetch code from external program memory locations starting at 5555" up to FFFF".+ote, however, that if lock bit ' is programmed, %A will be internally latched on reset. %A should be strapped to )!! for internal program executions. $his pin also receives the '3-volt programming enable voltage @)##A during Flash programming. J$A0' Input to the inverting oscillator amplifier and input to the internal clock operating circuit. J$A03 (utput from the inverting oscillator amplifier.
S+ec!al .u%ct!o% Re !"ter" A map of the on-chip memory area called the 9pecial Function &egister @9F&A space is
shown in $able '. +ote that not all of the addresses are occupied, and unoccupied addresses may not be implemented on the chip. &ead accesses to these addresses will in general return random data, and write accesses will have an indeterminate effect.-ser software should not write 's to these unlisted locations, since they may be used in Future products to invoke new features. In that case, the reset or inactive values of the new bits will always be 5.
T!mer 2 Re !"ter"N !ontrol and status bits are contained in registers $3!(+ @shown in $able 3A and $3.(, @shown in $able OA for $imer 3. $he register pair @&!A#3",&!A#30A are the !aptureC&eload registers for $imer 3 in 'O-bit capture mode or 'O-bit auto-reload mode.
)%terru+t Re !"ter"N $he individual interrupt enable bits are in the I% register. $wo priorities can be set for each of the six interrupt sources in the I# register.
,ual ,ata #ointer &egistersN $o facilitate accessing both internal and external data memory, two banks of 'O-bit ,ata #ointer &egisters are providedN ,#5 at 9F& address locations 73"-74" and ,#' at 72"-76". :it ,#9 R 5 in 9F& A-J&' selects ,#5 and ,#9 R ' selects ,#'. $he user should A0*AD9 initialize the ,#9 bit to the appropriate value before accessing the respective ,ata #ointer &egister. #ower (ff FlagN $he #ower (ff Flag @#(FA is located at bit 2 @#!(+.2A in the #!(+ 9F&. #(F is set to S'T during power up. It can be set and rest under software control and is not affected by reset.
.emory (rganization .!9-6' devices have a separate address space for #rogram and ,ata .emory. -p to O2= bytes each of external #rogram and ,ata .emory can be addressed. #rogram .emory If the %A pin is connected to ;+,, all program fetches are directed to external memory. (n the A$78963, if %A is connected to )!!, program fetches to addresses 5555" through 'FFF" are directed to internal memory and fetches to addresses 3555" through FFFF" are to external memory. ,ata .emory $he A$78963 implements 36O bytes of on-chip &A.. $he upper '37 bytes occupy a parallel address space to the 9pecial Function &egisters. $his means that the upper '37 bytes have the same addresses as the 9F& space but are physically separate from 9F& space. *hen an instruction accesses an internal location above address <F", the address mode used in the instruction specifies whether the !#- accesses the upper '37 bytes of &A. or the 9F& space. Instructions which use direct addressing access the 9F& space. 8 '8'8:B.I!&(B''C54 For example, the following direct addressing instruction accesses the 9F& at location 5A5" @which is #3A. .() 5A5", Vdata Instructions that use indirect addressing access the upper '37 bytes of &A.. For example, the following indirect addressing instruction, where &5 contains 5A5", accesses the data byte at address 5A5", rather than #3 @whose address is 5A5"A. .() Z&5, Vdata
+ote that stack operations are examples of indirect addressing, so the upper '37 bytes of data &A. are available as stack space. *atchdog $imer@(ne-time %nabled with &eset-outA $he *,$ is intended as a recovery method in situations where the !#- may be sub/ected to software upsets. $he *,$ consists of a '2-bit counter and the *atchdog $imer &eset @*,$&9$A 9F&. $he *,$ is defaulted to disable from exiting reset. $o enable the *,$, a user must write 5'%" and 5%'" in se uence to the *,$&9$ register @9F& location 5AO"A. *hen the *,$ is enabled, it will increment every machine cycle while the oscillator is running. $he *,$ timeout period is dependent on the external clock fre uency. $here is no way to disable the *,$ except through reset @either hardware reset or *,$ overflow resetA. *hen *,$ overflows, it will drive an output &%9%$ "I;" pulse at the &9$ pin. -sing the *,$ $o enable the *,$, a user must write 5'%" and 5%'" in se uence to the *,$&9$ register @9F& location 5AO"A. *hen the *,$ is enabled, the user needs to service it by writing 5'%" and 5%'" to *,$&9$ to avoid a *,$ overflow. $he '2-bit counter overflows when it reaches 'O474 @4FFF"A, and this will reset the device. *hen the *,$ is enabled, it will increment every machine cycle while the oscillator is running. $his means the user must reset the *,$ at least every 'O474 machine cycles. $o reset the *,$ the user must write 5'%" and 5%'" to *,$&9$. *,$&9$ is a write-only register. $he *,$ counter cannot be read or written. *hen *,$ overflows, it will generate an output &%9%$ pulse at the &9$ pin. $he &%9%$ pulse duration is 87x$(9!, where $(9! R 'CF(9!. $o make the best use of the *,$, it should be
serviced in those sections of code that will periodically be executed within the time re uired to prevent a *,$ reset. /&T &ur!% Po0er(o0% a%( )(le In #ower-down mode the oscillator stops, which means the *,$ also stops. *hile in #ower-down mode, the user does not need to service the *,$. $here are two methods of exiting #ower-down modeN by a hardware reset or via a level-activated external interrupt which is enabled prior to entering #ower-down mode. *hen #ower-down is exited with hardware reset, servicing the *,$ should occur as it normally does whenever the A$78963 is reset. %xiting #ower-down with an interrupt is significantly different. $he interrupt is held low long enough for the oscillator to stabilize. *hen the interrupt is brought high, the interrupt is serviced. $o prevent the *,$ from resetting the device while the interrupt pin is held low, the *,$ is not started until the interrupt is pulled high. It is suggested that the *,$ be reset during the interrupt service for the interrupt used to exit #ower-down mode. $o ensure that the *,$ does not overflow within a few states of exiting #ower-down, it is best to reset the *,$ /ust before entering #ower-down mode. :efore going into the I,0% mode, the *,I,0% bit in 9F& A-J& is used to determine whether the *,$ continues to count if enabled. $he *,$ keeps counting during I,0% @*,I,0% bit R 5A as the default state. $o prevent the *,$ from resetting the A$78963 while in I,0% mode, the user should always set up a timer that will periodically exit I,0%, service the *,$, and reenter I,0% mode.
*ith *,I,0% bit enabled, the *,$ will stop to count in I,0% mode and resumes the count upon exit from I,0%. -A&$ $he -A&$ in the A$78963 operates the same way as the -A&$ in the A$78!6' and A$78!63. For further information on the -A&$ operation, refer to the A$.%0 *eb site @httpNCCwww.atmel.comA. From the home page, select S#roductsT, then S756'Architecture Flash .icrocontrollerT, then S#roduct (verviewT. $imer 5 and ' $imer 5 and $imer ' in the A$78963 operate the same way as $imer 5 and $imer ' in the A$78!6' and A$78!63. For further information on the timersT operation, refer to the A$.%0 *eb site @httpNCCwww.atmel.comA. From the home page, select S#roductsT, then S756'-Architecture Flash .icrocontrollerT, then S#roduct (verviewT. $imer 3 $imer 3 is a 'O-bit $imerC!ounter that can operate as either a timer or an event counter. $he type of operation is selected by bit !C$3 in the 9F& $3!(+ @shown in $able 3A. $imer 3 has three operating modesN capture, auto-reload @up or down countingA, and baud rate generator. $he modes are selected by bits in $3!(+, as shown in $able 6. $imer 3 consists of two 7-bit registers, $"3 and $03. In the $imer function, the $03 register is incremented every machine cycle. 9ince a machine cycle consists of '3 oscillator periods, the count rate is 'C'3 of the oscillator fre uency. In the !ounter function, the register is incremented in response to a '-to-5 transition at its corresponding external input pin, $3. In this function, the external input is sampled
during 96#3 of every machine cycle. *hen the samples show a high in one cycle and a low in the next cycle, the count is incremented. $he new count value appears in the register during 94#' of the cycle following the one in which the transition was detected. 9ince two machine cycles @32 oscillator periodsA are re uired to recognize a '-to-5 transition, the maximum count rate is 'C32 of the oscillator fre uency. $o ensure that a given level is sampled at least once before it changes, the level should be held for at least one full machine cycle. !apture .ode In the capture mode, two options are selected by bit %J%+3 in $3!(+. If %J%+3 R 5, $imer 3 is a 'O-bit timer or counter which upon overflow sets bit $F3 in $3!(+. $his bit can then be used to generate an interrupt. If %J%+3 R ', $imer 3 performs the same operation, but a '-to-5 transition at external input $3%J also causes the current value in $"3 and $03 to be captured into &!A#3" and &!A#30, respectively. In addition, the transition at $3%J causes bit %JF3 in $3!(+ to be set. $he %JF3 bit, like $F3, can generate an interrupt. $he capture mode is illustrated in Figure '. Auto-reload @-p or ,own !ounterA $imer 3 can be programmed to count up or down when configured in its 'O-bit autoreload mode. $his feature is invoked by the ,!%+ @,own !ounter %nableA bit located in the 9F& $3.(, @see $able OA. -pon reset, the ,!%+ bit is set to 5 so that timer 3 will default to count up. *hen ,!%+ is set, $imer 3 can count up or down, depending on the value of the $3%J pin.
Figure 3 shows $imer 3 automatically counting up when ,!%+ R 5. In this mode, two options are selected by bit %J%+3 in $3!(+. If %J%+3 R 5, $imer 3 counts up to 5FFFF" and then sets the $F3 bit upon overflow. $he overflow also causes the timer registers to be reloaded with the 'O-bit value in &!A#3" and &!A#30. $he values in $imer in !apture .ode&!A#3" and &!A#30 are preset by software. If %J%+3 R ', a 'O-bit reload can be triggered either by an overflow or by a '-to-5 transition at external input $3%J. $his transition also sets the %JF3 bit. :oth the $F3 and %JF3 bits can generate an interrupt if enabled.
9etting the ,!%+ bit enables $imer 3 to count up or down, as shown in Figure 3. In this mode, the $3%J pin controls the direction of the count. A logic ' at $3%J makes $imer 3 count up. $he timer will overflow at 5FFFF" and set the $F3 bit. $his overflow also causes the 'O-bit value in &!A#3" and &!A#30 to be reloaded into the timer registers, $"3 and $03, respectively. A logic 5 at $3%J makes $imer 3 count down. $he timer underflows when $"3 and $03 e ual the values stored in &!A#3" and &!A#30. $he underflow sets the $F3 bit and causes 5FFFF" to be reloaded into the timer registers. $he %JF3 bit toggles whenever $imer 3 overflows or underflows and can be used as a '<th bit of resolution. In this operating mode, %JF3 does not flag an interrupt.
----------------------------------------------------------- R
:aud &ate ;enerator $imer 3 is selected as the baud rate generator by setting $!0= andCor &!0= in $3!(+ @$able 3A. +ote that the baud rates for transmit and receive can be different if $imer 3 is used for the receiver or transmitter and $imer ' is used for the other function. 9etting &!0= andCor $!0= puts $imer 3 into its baud rate generator mode, as shown in Figure 2. $he baud rate generator mode is similar to the auto-reload mode, in that a rollover in
$"3 causes the $imer 3 registers to be reloaded with the 'O-bit value in registers &!A#3" and &!A#30, which are preset by software. $he baud rates in .odes ' and 4 are determined by $imer 31s overflow rate according to the following e uation.
$he $imer can be configured for either timer or counter operation. In most applications, it is configured for timer operation @!#C$3 R 5A. $he timer operation is different for $imer 3 when it is used as a baud rate generator. +ormally, as a timer, it increments every machine cycle @at 'C'3 the oscillator fre uencyA. As a baud rate generator, however, it increments every state time @at 'C3 the oscillator fre uencyA. $he baud rate formula is given below.
where @&!A#3", &!A#30A is the content of &!A#3" and &!A#30 taken as a 'O-bit unsigned integer. $imer 3 as a baud rate generator is shown in Figure 2. $his figure is valid only if &!0= or $!0= R ' in $3!(+. +ote that a rollover in $"3 does not set $F3 and
will not generate an interrupt. +ote too, that if %J%+3 is set, a '-to-5 transition in $3%J will set %JF3 but will not cause a reload from @&!A#3", &!A#30A to @$"3, $03A. $hus, when $imer 3 is in use as a baud rate generator, $3%J can be used as an extra external interrupt. +ote that when $imer 3 is running @$&3 R 'A as a timer in the baud rate generator mode, $"3 or $03 should not be read from or written to. -nder these conditions, the $imer is incremented every state time, and the results of a read or write may not be accurate. $he &!A#3 registers may be read but should not be written to, because a write might overlap a reload and cause write andCor reload errors. $he timer should be turned off @clear $&3A before accessing the $imer 3 or &!A#3 registers. .odes ' and 4 :aud &atesR $imer 3 (verflowrateC'O [ [
$he $imer can be configured for either timer or counter operation. In most applications, it is configured for timer operation @!#C$3 R 5A. $he timer operation is different for $imer 3 when it is used as a baud rate generator. +ormally, as a timer, it increments every machine cycle @at 'C'3 the oscillator fre uencyA. As a baud rate generator, however, it increments every state time @at 'C3 the oscillator fre uencyA. $he baud rate formula is given below.
where @&!A#3", &!A#30A is the content of &!A#3" and &!A#30 taken as a 'O-bit unsigned integer. $imer 3 as a baud rate generator is shown in Figure 2. $his figure is valid only if &!0= or $!0= R ' in $3!(+. +ote that a rollover in $"3 does not set $F3 and will not generate an interrupt. +ote too, that if %J%+3 is set, a '-to-5 transition in $3%J will set %JF3 but will not cause a reload from @&!A#3", &!A#30A to @$"3, $03A. $hus, when $imer 3is in use as a baud rate generator, $3%J can be used as an extra external interrupt. +ote that when $imer 3 is running @$&3 R 'A as a timer in the baud rate generator mode, $"3 or $03 should not be read from or written to. -nder these conditions, the $imer is incremented every state time, and the results of a read or write may not be accurate. $he &!A#3 registers may be read but should not be written to, because a write might overlap a reload and cause write andCor reload errors. $he timer should be turned off @clear $&3A before accessing the $imer 3 or &!A#3 registers.
#rogrammable !lock (ut A 65\ duty cycle clock can be programmed to come out on #'.5, as shown in Figure 6. $his pin, besides being a regular IC( pin, has two alternate functions. It can be programmed to input the external clock for $imerC!ounter 3 or to output a 65\ duty cycle clock ranging from O' "z to 2 ."z @for a 'O-."z operating fre uencyA. $o configure the $imerC!ounter 3 as a clock generator, bit !C$3 @$3!(+.'A must be cleared and bit $3(% @$3.(,.'A must be set. :it $&3 @$3!(+.3A starts and stops the timer. $he clock-out fre uency depends on the oscillator fre uency and the reload value of
$imer 3 capture registers @&!A#3", &!A#30A, as shown in the following e uation.
In the clock-out mode, $imer 3 roll-overs will not generate an interrupt. $his behavior is similar to when $imer 3 is used as a baud-rate generator. It is possible to use $imer 3 as a baud-rate generator and a clock generator simultaneously. +ote, however, that the baud-rate and clock-out fre uencies cannot be determined independently from one another since they both use &!A#3" and &!A#30.
Interrupts $he A$78963 has a total of six interrupt vectorsN two external interrupts @I+$5 and I+$'A, three timer interrupts @$imers 5, ', and 3A, and the serial port interrupt. $hese interrupts are all shown in Figure O. %ach of these interrupt sources can be individually enabled or disabled by setting or clearing a bit in 9pecial Function &egister I%. I% also contains a global disable bit, %A, which disables all interrupts at once. +ote that $able 6 shows that bit position I%.O is unimplemented. -ser software should not write a ' to this bit position, since it may be used in future A$78 products. $imer 3 interrupt is generated by the logical (& of bits $F3 and %JF3 in register $3!(+. +either of these flags is cleared by hardware when the service routine is vectored to. In fact, the service routine may have to determine whether it was $F3 or %JF3 that generated the interrupt, and that bit will have to be cleared in software. $he $imer 5 and $imer ' flags, $F5 and $F', are set at 96#3 of the cycle in which the timers overflow. $he values are then polled by the circuitry in the next cycle. "owever, the $imer 3 flag, $F3, is set at 93#3 and is polled in the same cycle in which the timer overflows.
(scillator !haracteristics
J$A0' and J$A03 are the input and output, respectively, of an inverting amplifier that can be configured for use as an on-chip oscillator, as shown in Figure <. %ither a uartz crystal or ceramic resonator may be used. $o drive the device from an external clock source, J$A03 should be left unconnected while J$A0' is driven, as shown in Figure 7. $here are no re uirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed. Idle .ode In idle mode, the !#- puts itself to sleep while all the on-chip peripherals remain active. $he mode is invoked by software. $he content of the onchip &A. and all the special functions registers remain unchanged during this mode. $he idle mode can be terminated by any enabled interrupt or by a hardware reset. +ote that when idle mode is terminated by a hardware reset, the device normally resumes program execution from where it left off, up to two machine cycles before the internal reset algorithm takes control. (n-chip hardware inhibits access to internal &A. in this event, but access to the port pins is not inhibited. $o eliminate the possibility of an unexpected write to a port pin when idle mode is terminated by a reset, the instruction following the one that invokes idle mode should not write to a port pin or to external memory. #ower-down .ode In the #ower-down mode, the oscillator is stopped, and the instruction that invokes #ower-down is the last instruction executed. $he on-chip &A. and 9pecial Function &egisters retain their values until the #ower-down
mode is terminated. %xit from #owerdown mode can be initiated either by a hardware reset or by an enabled external interrupt. &eset redefines the 9F&s but does not change the on-chip &A.. $he reset should not be activated before )!! is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize.
#rogram .emory 0ock :its $he A$78963 has three lock bits that can be left unprogrammed @-A or can be programmed @#A to obtain the additional features listed in the following table.
*hen lock bit ' is programmed, the logic level at the %A pin is sampled and latched during reset. If the device is powered up without a reset, the latch
initializes to a random value and holds that value until reset is activated. $he latched value of %A must agree with the current logic level at that pin in order for the device to function properly. Pro ramm!% the .la"h 1 Parallel 2o(e $he A$78963 is shipped with the on-chip Flash memory array ready to be programmed. $he programming interface needs a high-voltage @'3-voltA program enable signal and is compatible with conventional third-party Flash or %#&(. programmers. $he A$78963 code memory array is programmed byte-by-byte. #rogramming AlgorithmN :efore programming the A$78963, the address, data, and control signals should be set up according to the Flash programming mode table and Figures '4 and '2. $o program the A$78963, take the following stepsN '. Input the desired memory location on the address lines. 3. Input the appropriate data byte on the data lines. 4. Activate the correct combination of control signals. 2. &aise %AC)## to '3). 6. #ulse A0%C#&(; once to program a byte in the Flash array or the lock bits. $he byte-write cycle is self-timed and typically takes no more than 65 ]s. &epeat steps ' through 6, changing the address and data for the entire array or until the end of the ob/ect file is reached.
,ata #ollingN $he A$78963 features ,ata #olling to indicate the end of a byte write cycle. ,uring a write cycle, an attempted read of the last byte written will result in the complement of the written data on #5.<. (nce the write cycle has been completed, true data is valid on all outputs, and the next cycle may begin. ,ata #olling may begin any time after a write cycle has been initiated. Rea(3/#u"3N $he progress of byte programming can also be monitored by the &,DC:9D output signal. #4.5 is pulled low after A0% goes high during programming to indicate :-9D. #4.5 is pulled high again when programming is done to indicate &%A,D. Pro ram Ver!,3N If lock bits 0:' and 0:3 have not been programmed, the programmed code data can be read back via the address and data lines for verification. $he status of the individual lock bits can be verified directly by reading them back. Rea(!% the S! %ature #3te"N $he signature bytes are read by the same procedure as a normal verification of locations 555", '55", and 355", except that #4.O and #4.< must be pulled to a logic low. $he values returned are as follows. @555"A R '%" indicates manufactured by Atmel @'55"A R 63" indicates A$78963 @355"A R 5O" !hip %raseN In the parallel programming mode, a chip erase operation is initiated by using the proper combination of control signals and by pulsing A0%C#&(; low
for a duration of 355 ns - 655 ns. In the serial programming mode, a chip erase operation is initiated by issuing the !hip %rase instruction. In this mode, chip erase is self-timed and takes about 655 ms. ,uring chip erase, a serial read from any address location will return 55" at the data output. Pro ramm!% the .la"h 1 Ser!al 2o(e $he !ode memory array can be programmed using the serial I9# interface while &9$ is pulled to )!!. $he serial interface consists of pins 9!=, .(9I @inputA and .I9( @outputA. After &9$ is set high, the #rogramming %nable instruction needs to be executed first before other operations can be executed. :efore a reprogramming se uence can occur, a !hip %rase operation is re uired. $he !hip %rase operation turns the content of every memory location in the !ode array into FF". %ither an external system clock can be supplied at pin J$A0' or a crystal needs to be connected across pins J$A0' and J$A03. $he maximum serial clock @9!=A fre uency should be less than 'C'O of the crystal fre uency. *ith a 44 ."z oscillator clock, the maximum 9!= fre uency is 3 ."z. Ser!al Pro ramm!% Algorithm $o program and verify the A$78963 in the serial programming mode, the following se uence is recommendedN '. #ower-up se uenceN Apply power between )!! and ;+, pins.
9et &9$ pin to S"T.If a crystal is not connected across pins J$A0' and J$A03, apply a 4 ."z to44 ."z clock to J$A0' pin and wait for at least '5 milliseconds. 3. %nable serial programming by sending the #rogramming %nable serial instruction to pin .(9IC#'.6. $he fre uency of the shift clock supplied at pin 9!=C#'.< needs to be less than the !#- clock at J$A0' divided by 'O. 4. $he !ode array is programmed one byte at a time in either the :yte or #age mode. $he write cycle is self-timed and typically takes less than 5.6 ms at 6). 2. Any memory location can be verified by using the &ead instruction which returns the content at the selected address at serial output .I9(C#'.O. 6. At the end of a programming session, &9$ can be set low to commence normal device operation. #ower-off se uence @if neededAN 9et J$A0' to S0T @if a crystal is not usedA. 9et &9$ to S0T. $urn )!! power off. &ata Poll!% N $he ,ata #olling feature is also available in the serial mode. In this mode,during a write cycle an attempted read of the last byte written will result in the complement of the .9: of the serial output byte on .I9(.
Flash #rogramming and )erification *aveforms B 9erial .ode Figure '4. 9erial #rogramming *aveforms
C3A%TER 4 INTERFACING DE(ICES
RS#/# 5+erial port67
&9-343 @&ecommended 9tandard - 343A is a telecommunications standard for binary serial communications between devices. It supplies the roadmap for the way devices speak to each other using serial ports. $he devices are commonly referred to as a ,$% @data terminal e uipmentA and ,!% @data communications e uipmentA? for example, a computer and modem, respectively. &9343 is the most known serial port used in transmitting the data in communication and interface. %ven though serial port is harder to program than the parallel port, this is the most effective method in which the data transmission re uires less wires that yields to the less cost. $he &9343 is the communication line which enables the data transmission by only using three wire links. $he three links provides ^transmit1, ^receive1 and common ground... $he ^transmit1 and ^receive1 line on this connecter send and receive data between the computers. As the name indicates, the data is transmitted serially. $he two pins are $J, _ &J,. $here are other lines on this port as &$9, !$9, ,9&, ,$&, and &$9, &I. $he ^'1 and ^51 are the data which defines a voltage level of 4) to 36) and -4) to -36) respectively. he electrical characteristics of the serial port as per the %IA @%lectronics Industry AssociationA &9343! 9tandard specifies a maximum baud rate of 35,555bps, which is slow compared to today1s standard speed. For this reason, we have chosen the new &9-343, 9tandard, which was recently released. $he &9-343, has existed in two types. i.e., ,-$D#% 36 pin connector and ,$D#% 8 pin connector, which are male connectors on the back of the #!. Dou need
a female connector on your communication from "ost to ;uest computer. $he pin outs of both ,-8 _ ,-36 are show below
,-$ype-8 pin ,-$ype-36 pin no. 4 3 < 7 O 6 ' 2 8 no. 3 4 2 6 O < 7 35 33
#in outs &, $, &$9 !$9 ,9& 9; ,!, ,$& &I
Function &eceive ,ata @9erial data inputA $ransmit ,ata @9erial data outputA ready to exchange data !lear to send @i.e.? modem is ready to exchange dataA ,ata ready state @-A&$ establishes a linkA 9ignal ground ,ata !arrier detect @$his line is active when modem detects a carrier ,ata $erminal &eady. &ing Indicator @:ecomes active when modem detects ringing signal from #9$+
&e uest to send @acknowledge to modem that -A&$ is
R+#/#
*hen communicating with various micro processors one needs to convert the &9343 levels down to lower levels, typically 4.4 or 6.5 ) olt+7 "ere is a cheap and simple way to do that. Serial RS8#/# @).32A communication works with voltages -'6) to M'6) for high and low. (n the other hand, TTL logic operates between 5) and M6) . .odern low power consumption logic operates in the range of 5) and M4.4) or even lower.
RS8#/# TTL -'6) W -4) M3) W M6) M4) W M'6) 5) W M5.7)
Lo2ic "igh 0ow
$hus the &9-343 signal levels are far too high TTL electronic+9 and the negative &9-343 voltage for high can1t be handled at all by computer logic. $o receive serial data from an &9-343 interface the voltage has to be reduced. Also the low and high voltage level has to be inverted. $his level converter uses a Ma:#/# and five capacitor+. $he max343 is uite cheap @less than 6 dollarsA or if youre lucky you can get a free sample from Ma:i)7$he .AJ343 from Ma:i) was the first I! which in one package contains the necessary drivers and receivers to adapt the &9-343 signal voltage levels to $$0 logic. It became popular, because it /ust needs one voltage @M6) or M4.4)A and generates the necessary &9-343 voltage levels. .AJ 343 #I+ ,IA;&A. M---UC---M ' -`!'M )cc`- 'O 3 -`)M gnd`- '6 4 -`!'- $'(`- '2 2 -`!3M &'I`- '4 6 -`!3- &'(`- '3 O -`)- $'I`- '' < -`$3( $3I`- '5 7 -`&3I &3(`- 8 M--------M
RS#/# INTERFACED TO MA; #/#
J2 9 8 7 6 5 4 3 2 1 16 U3 T1O U T T XD P 3 .1 C4 5V C 0 . 51 u f C6 0 .1 u f 0 .1 u f C7 0 .1 u f M A X32 32 15 2 6 13 8 10 11 1 3 4 5 R 1 IN R 2 IN T2 IN T1 IN C C C C 1+ 12+ 2GND C1 1uf R 1O U T R 2O U T T1O U T T2O U T 12 9 14 7 P 3 .0 R X D T1O U T
V+ V-
&s343 is 8 pin db connector,only three pins of this are used ie 3,4,6 the transmit pin of rs343 is connected to rx pin of microcontroller
Ma:#/# interfaced to )icrocontroller
VCC
.AJ343 is connected to the microcontroller as shown in the figure above '', '3 pin are connected to the '5 and '' pin ie transmit and receive pin microcontroller of
LED<S $
Fi2$0! LED<+ interfacin2 0%, @light emitting diodeA color is characterized by the wavelength it emits. $he peak emission wavelength differs according to the energy released during recombination. $his energy differs according to the 0%, material used.
.ixed crystals of ;a# _ ;aAs are used. :y varying the mixing ratio SJT, different luminous colors from red to yellow are obtained. 0%,s can typically draw up to 45mA.A current limiting resistor is mandatory to protect both the microcontroller _ 0%,. %ven connecting a led through a resistor is not advisable in case of 756'.A +#+ or a #+# transistor may be used. $his way even higher currents can be used. (hms law can be used to calculate the value of the current limiting resistor , i.e IR)C&. REG&LATED %O'ER S&%%LY A variable regulated power supply, also called a variable bench power supply, is one where you can continuously ad/ust the output voltage to your re uirements. )arying the output of the power supply is the recommended way to test a pro/ect after having double checked parts placement against circuit drawings and the parts placement guide. $his type of regulation is ideal for having a simple variable bench power supply. Actually this is uite important because one of the first pro/ects a hobbyist should undertake is the construction of a variable regulated power supply. *hile a dedicated supply is uite handy e.g. 6) or '3), itKs much handier to have a variable supply on hand, especially for testing. .ost digital logic circuits and processors need a 6 volt power supply. $o use these parts we need to build a regulated 6 volt source. -sually you start with an unregulated power $o make a 6 volt power supply, we use a 0.<756 voltage regulator I! @Integrated !ircuitA. $he I! is shown below.
$he 0.<756 is simple to use. Dou simply connect the positive lead of your unregulated ,! power supply @anything from 8),! to 32),!A to the Input pin, connect the negative lead to the !ommon pin and then when you turn on the power, you get a 6 volt supply from the (utput pin.
CIRC&IT FEAT&RES :rief description of operationN ;ives out well regulated M6) output, output current capability of '55 mA
!ircuit protectionN :uilt-in overheating protection shuts down output when regulator I! gets too hot !ircuit complexityN )ery simple and easy to build !ircuit performanceN )ery stable M6) output voltage, reliable operation Availability of componentsN %asy to get, uses only very common basic components
,esign testingN :ased on datasheet example circuit, I have used this circuit succesfully as part of many electronics pro/ects ApplicationsN #art of electronics devices, small laboratory power supply #ower supply voltageN -nreglated ,! 7-'7) power supply #ower supply currentN +eeded output current M 6 mA !omponent costsN Few dollars for the electronics components M the input transformer cost
BLOCK DIAGRAM
E;AM%LE CIRC&IT DIAGRAM$
RESET $he pin 8 of the microcontroller 756' is the &%9%$ pin. -pon applying a high pulse to this pin, the micro controller will reset and terminate all activities. $his is often called as power-on reset. Activating a power-on reset will cause all the values in the registers to be lost. It will set program counter to all 51s. the
reset can be given by either power-on reset circuit or by using a momentary switch. RESET val*e of +o)e ."0 re2i+ter+$ Re2i+ter #! ,#$& A!! #9* 9# : #5-#4 Re+et val*e 51e:6 5555 5555 55 55 5< 55 FF
Ta=le$0. Re+et val*e+ ta=le
%O'ER S&%%LY #ower supply is an important part of operation of the .icrocontroller. .icrocontroller operates at M6v ,! and also for other I!s and displays.
INTROD&CTION TO ORCAD5SC3EMATIC DESIGN TOOL6
OrCAD is a software tool suite used primarily for electronic design automation. $he software is used mainly to create electronic prints for manufacturing of printed circuit boards, by electronic design engineers and electronic technicians to manufacture electronic schematics and diagrams, and for their simulation. $he name (r!A, is a portmanteau, reflecting the softwareKs originsN Oregon M !A,. $he (r!A, product line is fully owned by !adence ,esign 9ystems. $he latest iteration has the ability to maintain a database of available integrated circuits. $his database may be updated by the user by downloading packages from component manufacturers, such as Analog ,evices or $exas Instruments.
$he !adence (r!A, product line includes affordable, high-performance #!:
design tools that boost productivity for smaller design teams and individual #!: designers. $o stay competitive in todayKs market, engineers must take a design from engineering through manufacturing with shorter design cycles and faster time to market. $o be successful, you need a set of powerful, intuitive, and integrated tools that work seamlessly across the entire design flow. !adenceY (r!A,Y personal productivity tools @including !adenceY #9piceYA have a long history of addressing these demands. ,esigned to boost productivity for smaller design teams and individual #!: designers, (r!A, #!: design suites grow with your needs and technology challenges. $he powerful, tightly integrated #!: design suites include design capture, librarian tools, a #!: editor, an autoCinteractive router, and optional analog and mixed-signal simulator. $he affordable, high-performance (r!A, product line is easily scalable with the full complement of !adenceY AllegroY #!: solutions. $he (r!A, product line is supported by a worldwide network of !adence !hannel #artners. For sales, technical support, and training in uiries please visit the global !adence !hannel #artner listing to find a partner in your region.
C3A%TER " %RO>ECT CIRC&ITRY
5V R 47 3 .3 " R 4 6 LC D ,VC C C 43 10uf C44 10'f 3 POT 1 P 0 .4 P 0 .5 P 0 .6 P 0 .7 R 50 R 51 R 52 R 53 300 300 300 300 P 0 .1 P 0 .2 0 R55 5V 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 9 R -P A C $ 3 .3 " R 5 4 2 1 5V R 48 2 3 4 5 6 7 8 9 P 0 .0 P 0 .1 P 0 .2 P 0 .3 P 0 .4 P 0 .5 P 0 .6 P 0 .7 P 1 .0 P 1 .1 P 1 .2 P 1 .3 P 1 .4 P 1 .5 P 1 .6 P 1 .7 40 U 21 3 3 3 3 3 3 3 3 9 8 7 6 5 4 3 2 1 2 3 4 5 6 7 8 19 18 9 31 P P P P P P P P P P P P P P P P 0 .0 . A 0 .1 . A 0 .2 . A 0 .3 . A 0 .4 . A 0 .5 . A 0 .6 . A 0 .7 . A 1 .0 1 .1 1 .2 1 .3 1 .4 1 .5 1 .6 1 .7 D D D D D D D D 0 1 2 3 4 5 6 7 21 22 23 24 25 26 27 28 10 11 12 13 14 15 16 17 29 30 AL 2$ 2 1 3 AT89C 51 10" 3 GND 2 1 )PDT 2 U 25 5V 20 )PD T P P P P P P P P P P P P P P P P 2 2 2 2 2 2 2 2 3 3 3 3 3 3 3 3 .0 .1 .2 .3 .4 .5 .6 .7 .0 .1 .2 .3 .4 .5 .6 ) C L .7 ) D A 5V 4.7$ R 49 2 .2 $ 4 7 3 8 D I) 100 ( 2 6 TR T* R CV 1 3 33 C 86 C 3 470 2 1 (12 +C 547 2 1738 10" D35 L D 1 330 M C T2 1 3 1$ U 51 2 2 1 U 50 10$ 6 5 4 P 2 .4 5V 5V
GN D
100'f P 0 .0
LC D ,VC C
VCC
C 45
P 2.0.A 8 P 2.1.A 9 P 2.2.A 10 P 2.3.A 11 P 2.4.A 12 P 2.5.A 13 P 2.6.A 14 P 2.7.A 15 P 3 .0 .R X D P 3 .1 .TXD P 3 .2 .IN T O P 3 .3 . I N T 1 P 3.4.TO P 3 .5 . T 1 P 3.6./ R P 3 .7 .R D P) N A L .P R O G
D 13 L D
J7 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 U 22 16 %&'16 9 8 7 6 5 4 3 2 1 U 23 T2O U T 5V T X D P 3 .1 C 49 C . 51 1u f 0 C 50 10uf R 58 10" C 52 0 .1 u f 0 .1 u f 13 8 10 11 1 3 4 5 2 6 C 53 0 .1 u f R )T )/ 4 1 2 5V J8 3 2 1 1 D 14 1N 4001 C 54 1000uf G ND 2 12! M A X3232 15 R 1 IN R 2 IN T2IN T1IN C 1+ C 1C 2+ C 2V+ VC 46 1uf R 1O U T R 2O U T T1O U T T2O U T 12 9 14 7 P 3 .0 R X D C 48 T2O U T 27-f 5V R 57 0 5 27-f C 47
VR1 10K
1
U 49 N 555
D34 L D 5
VC C
5V
R)T
XTA L1 XTA L2 R )T A .V P P GND
R 56 U 24
0 .0 0 1 u
0 .0 0 1 u
3 JU MP R 3 3
SC3EMATIC
C O N N #J A C $
U 26 1 V IN
L 7 8 0 5 .TO 3 GN D VO UT 3 5V
C 55 10uf
C 56 1uf
JP4
4 .7 $ 5V 4 7 P 0 .4 P 0 .2 D 52 L D P 0.3 D 54 D 53 L D 1 L D 2 3 8
D I)
100 ( 3 1$ 33 U 51 2 2 C 86 C 3 470 2 1 ( 12 +C 547 2 M C T2 3 1 U 50 10$ 6 5 4 P 2 .5
VR1 10K
2 6
TR T* R CV 1
U 49 N 555
D 34 L D 1738 1 5
10" 5V
D 35 L D
330
0 .0 0 1 u
0 .0 0 1 u
4 .7 $ 5V 4.7$ 4 R 7 3 8 D I) 3 33 C V 100 1$ U 51 2 2 C 86 C 3 470 2 1 ( 12 +C 547 2 1738 1 10" D 35 L D M C T2 2 1 3 1 U 50 6 5 4 3 10$ P 2 .0 8
5V
( 2 6 TR T* R 1
5V 4 7 8
VR1 10K
1
D I)
100 ( 3 1$ 33 U 51 2 2 C 86 C 3 470 2 1 ( 12 +C 547 2 M C T2 3 1 U 50 10$ 6 5 4 P 2 .2
U 49 N 555
D 34 L D 5
VR1 10K
1
2 6
TR T* R CV 1
330
U49 N 555
D34 L D 1738 1 5
0 .0 0 1 u
0 .0 0 1 u
10"
D35 L D
330
0 .0 0 1 u
0 .0 0 1 u
5V
5V
4 .7 $ 5V 4 8
4 .7 $ 5V 4 100 1$ 33 C V U51 2 2 C 86 C 1 3 470 2 ( 12 +C 547 2 1738 1 M C T2 10" D 35 L D 1 3 1 U 50 6 5 4 1 10$ P 2 .1 2 3 7 8
( 3 2 6 TR T* R 1
D I)
D I)
( 2 6 TR T* R CV 1
3 33
100 1$ U 51 2 2 C 86 C 3 470 2 1 ( 12 +C 547 2 1738 1 M C T2 330 1 3 1 U 50 6 5 4 10$ P 2 .3
VR1 10K
1
VR1 10K
U 49 N 555
D 34 L D 5
U 49 N 555
D 34 L D 5
10"
D 35 L D
330
0 .0 0 1 u
0 .0 0 1 u
0 .0 0 1 u
0 .0 0 1 u
T 56 73 1 T 56 73 2
D E N S IT Y B A S E D T R A F F IC C O N T R O L
) 5> 3 A2 D 963A
D & % u ? 3 ' 6#N u ? @ 3 < 1D &%2 / 3 4 ' 3 8 4 9 : ; #M 9 <% = #0 5 ;# 2 0 0 8 ) =336 1 &f 1
R 3! 1R 3! C &432
SC3EMATIC DESCRI%TION *e can break the pro/ect into three parts like micro controller section, power supply section, and ,.!. regulated power supply section. $he !ircuit shows the complete diagram of the ,ensity based traffic control system .icro controller section contains only micro controller A$78963 and a crystal of ''.5683 ."z for oscillator. As micro controller works on the program inside the memory. As a program generates the login therefore it does not re uire any logic circuits. As the controller keeps all the memory and IC( ports inside it, it contains very less components in its outer configuration. #ower to the I! supplied is M6v ,!
$he I& sensors are interfaced port 3 pins of microcontroller and 0%,1s to the port 5 pins of microcontroller .lcd connected to the remaining port pins of microcontroller #ower supply is an important part of operation of the .icrocontroller. .icrocontroller operates at M6v ,! and also for other I!s and displays.
C3A%TER ? SDCC COM%ILATION TOOL
SMALL DE(ICE C COM%ILER 9,!! is a retargettable, optimizing A+9I - ! compiler that targets the Intel 8051, Maxim 80DS390, Zilog Z80 and the Motorola 68HC08 based .!-s. *ork is in progress on supporting the Microchip PIC16 and PIC18 series. 9,!! is Free (pen 9ource 9oftware, distributed under ;+- ;eneral #ublic 0icense @;#0A.
F%A$-&%9

A9JJJJ and A90I+=, a Freeware, retargettable assembler and linker. extensive .!- specific language extensions, allowing effective use of the underlying hardware. a host of standard optimizations such as glo al !" expre!!ion elimination, loop optimi#ation! $loop in%ariant, !trength re&"ction o' in&"ction %aria le! an& loop re%er!ing (, con!tant 'ol&ing and propagation, cop) propagation, &ea& co&e elimination an& *"mp ta le! 'or +!,itch+ !tatement!.!- specific optimizations, including a global register allocator. adaptable .!- specific backend that should be well suited for other 7 bit .!-s independent rule based peep hole optimizer. a full range of data typesN char @8 bits, ' byteA, short @16 bits, 3 bytesA, int @16 bits, 3 bytesA, long @3. bit, 2 bytesA and float @/ byte I%%%A. the ability to add inline assembler code anywhere in a function. the ability to report on the complexity of a function to help decide what should be re-written in assembler. a good selection of automated regression tests.
9,!! also comes with the !o"rce le%el &e "gger 9,!,:, using the current version of ,anielKs s6' simulator. 9,!! was written by 9andeep ,utta and released under a ;#0 license. 9ince its initial release there have been numerous bug fixes and improvements. As of ,ecember '888, the code was moved to 9ourceForge where all the Gusers turned developersG can access the same source tree. 9,!! is constantly being updated with all the usersK and developersK input.
012 and g #80 ports are no longer maintained.
9,!! 9-##(&$9 F(00(*I+; #0A$F(&.9 0inux - x7O, .icrosoft *indows - x7O and .ac (9 x - ppc are the primary, so called Gofficially supportedG platforms. 9,!! compiles natively on 0inux and .ac (9 J using using gcc. *indows release and snapshot builds are made by cross compiling to mingw43 on a 0inux host. *indows 8xC+$C3555CJ# users are recommended to use !ygwin
@httpNCCsources.redhat.comCcygwinCA or may try the unsupported :orland ! compiler or .icrosoft )isual !MM build scripts. 9-##(&$ (F 9,!! 9,!! and the included support packages come with fair amounts of documentation and examples. *hen they arenKt enough, you can find help in the places listed below. "ere is a short check list of tips to greatly improve your chances of obtaining a helpful response. '. Attach the code you are compiling with 9,!!. It should compile Gout of the boxG. 9nippets must compile and must include any re uired header files, etc. Incomplete information will hamper your chance of a timely response. 3. 9pecify the exact command you use to run 9,!!, or attach your .akefile. 4. 9pecify the 9,!! version @type Gsdcc -vGA, your platform and operating system.
2. #rovide an exact copy of any error message or incorrect output. #lease attempt to include these 2 important parts, as applicable, in all re uests for support or when reporting any problems or bugs with 9,!!. $hough this will make your message lengthy, it will greatly improve your chance that 9,!! users and developers will be able to help you. 9ome 9,!! developers are frustrated by bug reports without code provided that they can use to reproduce and ultimately fix the problem, so please be sure to provide sample code if you are reporting a buga
-9I+; 9,!! ;etting 9tartedN ,ownload 9,!! from httpNCCsdcc.sourceforge.netC If you are developing on a *indows platform I strongly recommend youget httpNCCprdownloads.sourceforge.netCsdccCsdcc-3.6.5-setup.exe @orwhatever is the latest revisionA because it has an install wizard which will
copy the files and will ask you if you want 9,!! added to your path@"I+$N I recommend you add 9,!! to your pathaA $he most up-to-date documentation is at httpNCCsdcc.sourceforge.netCdocCsdccman.htmlC. 9,!! also comes with anolder revision of the same documentation which is installed in !NU#rogram FilesU9,!!UdocUsdccman.htmlUindex.html by default. 9tudents have reported experiencing problems with rev 3.4.5 and rev3.2.5 of 9,!!, so make sure you are using rev 3.6.5 or newer. ,ownload ;+- make from httpNCCece.colorado.eduCbmcclurelCmake.exe. o Dou can add make to your path as well. G If you are developing on *indows J#N X &ight click on S.y !omputerT X 9elect the SAdvancedT tab X !lick on S%nvironment )ariablesT X 9elect S#A$"T and S%ditT if it already exists. (therwise click S+ewT and create a #A$" variable. X Add the location of make.exe to the S)ariable )alueT G If you are developing on another version of *indows you will need to investigate further because the %nvironment variables maynot be in the same location. For example, in *indows +$ look in 9tartC9ettingsC!ontrol #anelC9ystem and select the %nvironment tab to modify the #A$" variable. 9,!! .emory .odels
9,!! basically has two memory modelsN 9mall and 0arge $he large memory model will allocate all variables in external &A. by ,%FA-0$ G )ariables stored in internal &A. must be declared with the SdataT or SnearT keyword $he small memory model will allocate all variables in internal, directlyaddressable &A. by default G )ariables stored in external &A. must be declared with the SxdataT or SfarT keyword a 9,!! recommends the use of the small memory model for more efficient code. "owever, for this class, since we are using combined program and data memory spaces, I think it is safer to use the large memory model. a :e aware that, regardless of the memory model you choose, if you do not explicitly declare a pointer as dataCnear or xdataCfar it will be 4 bytesa
9,!! :asics
Assuming that the location of 9,!! is defined in your path, you can use the following syntax for your header filesN Vinclude cstdio.hd
$o use 9,!! on the command line, use a command line syntax similar to the following @noteN a more complete list of flags is shown in the example makefile laterAN sdcc --code-loc 5xO555 --xram-loc 5x:555 file.c 9,!! will generate the following output filesN file.asm B Assembler file created by the compiler file.lst B Assembler listing file created by the assembler file.rst B Assembler listing file updated by the linkage editor file.sym B 9ymbol listing created by the assembler file.rel B (b/ect file created by the assembler, Input to the linkage editor file.map B .emory map for the load module created by the linker file.mem B 9ummary of the memory usage file.ihx B $his is the load module in Intel hex format :y default 9,!! uses the small memory model $he assembler is given the memory locations as .area directives instead of(&; statements. Dou must remember to use the --code-loc and --xram-loc directives because this tells the linker where to place things in memorya Dou can examine the file.rst and file.map output files to verify that your code and data are assigned to the correct location. a
9,!! standard library routines .ost standard routines are present @printf, malloc, etcWA "oweverN G printf depends on putchar@A which is not implemented. X Dou must implement putchar@A X $his allows you to decide where printf is displayed @on a terminal via serial port, on an 0!,, etcWA X $he putchar@A function must have the following formatN void putchar@char cA? X If you need a getchar@A function, the format isN char getchar@A? malloc depends on having heap space created but 9,!! does notautomatically create heap space for your program. X Dou must provide heap space for malloc to allocate memory from. X $his can be done byN Vinclude cmalloc.hd Vdefine "%A#e9I>% 2555 unsigned char xdata heapE"%A#e9I>%F? void main@A f initedynamicememory@@.%."%A,%&
xdata gAheap, "%A#e9I>%A? h 9,! I+$%&&-#$ 9-##(&$ $o write an I9& in !, create a function similar to the following formatN void isrefoo@A interrupt ' f h G $his format tells 9,!! to generate an interrupt vector @at offset5x5: from the --code-loc addressA that calls isrefoo in response tointerrupt '. G It also tells 9,!! to generate a &%$I instruction instead of a &%$instruction to return from a call to isrefoo@A. o $he standard code generated for the interrupt is not very efficient. 9,!! takes a conservative view and will save registers on the stack before executing any of your code in the I9& and it will restore those registers before executing the &%$I instruction. G Dou can use the keyword SenakedT to make your interrupt faster. $his keyword will prevent 9,!! from generating any entryCexit code to save registers for your I9&. X *A&+I+;N If you use the enaked keyword you must save and restore any registers that are modified by your I9& or you must guarantee that no registers are used by your I9&. X I would only recommend using the enaked keyword if your I9& only contains inline assembly in which case you know explicitly which registers are used or you are setting a
single bit @such as a port pinA in which case no registers are used. X Dou can use the enaked keyword on any function, not /ust for I9&s. In non-I9& routines you must be aware of the calling convention used and saveCrestore the registers you used within your function as appropriate. a 9,!! serial port initialization o $here is no support routine built into 9,!! to initialize the serial port o If you want to use the serial port with your ! program that you burn into%#&(. you will have to initialize the hardware first.
C3A%TER ? FLAS3 MAGIC
FLAS3 MAGIC Flash .agic is a #! tool for programming flash based microcontrollers from +J# using a serial protocol while in the target hardware Flash .agic is a feature-rich *indows based tool for the downloading of code into +J# flash microcontrollers. It utilises a feature of the microcontrollers called I9#, which allows the transfer of data serially between a #! and the device. Flash .agic can erase devices, program them, read data and read and set various configuration information. &ather than providing the basic features of I9#, Flash .agic adds additional features and intelligence, allowing complex operations to be performed. For example, erasing can be any collection of pages pages, blocks, the hex file to be programmed or the entire device. 9ome devices store the I9# bootloader in flash memory, so Flash magic implements methods to protect this code from being erased. Additional advanced features of Flash .agic include the automatic programming of checksums, entering I9# mode via a serial command, execution of Iust In $ime modules allowing endless flexibility in the data programmed, control over &9343 signals to place devices into I9# mode, and control over the timing of such signals. Flash .agic has been available for free for over six years and supports all current 7-bit @756'A, 'O-bit @JAA and 43-bit @A&.A flash microcontrollers from +J#.
7 %o++i=le &+e+ 9ome ideas for applications built on the Flash .agic platformN
!ustom I9# tool for in-house use, for example production line programming where it is essential the user interface is simplified as much as possible %nd user I9# tool for updating the firmware of products. Dou can build the hex file into the application or allow it to be fetched over the internet. Adverts for new products could be displayed to the user. -se one tool for all your products involving potentially multiple +J# microcontrollers. ;ang programming tool. Invoke multiple instances of the Flash .agic ,00 in seperate threads, each using a different !(. port to allow parallel I9# programming Future-proofing products. &ather than write your own I9# tool and have to keep updating it for new +J# devices, updates to the ,00 will automatically add new devices
9creenshots .ain window
"ex file information
%xecute from &A. or Flash @0#!3xxxA
,isplay flash memory
,evice signature
9tart bootloader
:lank check
Advanced options - timeouts
Advanced options B hardware
%xecuting a script
.eature" 9traightforward and intuitive user interface
Five simple steps to erasing and programming a device and setting any options desired #rograms Intel "ex Files Automatic verifying after programming Fills unused Flash to increase firmware security
Ability to automatically program checksums. -sing the supplied checksum calculation routine your firmware can easily verify the integrity of a Flash block, ensuring no unauthorized or corrupted code can ever be executed #rogram security bits !heck which Flash blocks are blank or in use with the ability to easily erase all blocks in use &ead the device signature &ead any section of Flash and save as an Intel "ex File &eprogram the :oot )ector and 9tatus :yte with the help of confirmation features that prevent accidentally programming incorrect values ,isplay the contents of Flash in A9!II and "exadecimal formats 9ingle-click access to the manual, Flash .agic home page and +J# .icrocontrollers home page Ability to use high-speed serial communications on devices that support it. Flash .agic calculates the highest baudrate that both the device and your #! can use and switches to that baudrate transparently !ommand 0ine interface allowing Flash .agic to be used in I,%s and :atch Files .anual in #,F format 9upports half-duplex communications )erify "ex Files previously programmed 9ave and open settings Able to reset &x3 and OOx devices @revision ; or higherA Able to control the ,$& and &$9 &9343 signals when connected to &9$ and C#9%+ to place the device into :oot&(. and %xecute modes automatically. An example circuit diagram is included in the .anual. %ssential for I9# with target hardware that is hard to access.
Able to send commands to place the device in :oot&(. mode, with support for command line interfaces. $he installation includes an example pro/ect for the =eil and &aisonance 756' compilers that show how to build support for this feature into applications. Able to play any *ave file when finished programming. :uilt in automated version checker - helps ensure you always have the latest version. #owerful, flexible Iust In $ime !ode feature. *rite your own II$ .odules to generate last minute code for programming. -ses includeN
o o o o o o o o
9erial number generation !opy protection and copy authorization 9toring program date and time - manufacture date 9toring program operator and location 0ookup table generation 0anguage tables or language selection !entralized record keeping (btaining latest firmware from the !orporate *eb site or pro/ect intranet
9ponsored by +J# 9emiconductors Features automatically updating Internet links including links to related technical documents, software updates, utilities and code examples, using %mbedded"ints technology ,isplays information about the selected "ex File, including the creation and modification dates, flash memory used, percentage of the current device used !ompletely freea
Flash .agic works on any versions of *indows, except *indows 86. '5.b of disk space is re uired
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DENSITY BASED TRAFFIC CONTROL SYSTEM

DENSITY BASED TRAFFIC CONTROL SYSTEM

DENSITY BASED TRAFFIC CONTROL SYSTEM

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DENSITY BASED TRAFFIC CONTROL SYSTEM

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DENSITY BASED TRAFFIC CONTROL SYSTEM

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DENSITY BASED TRAFFIC CONTROL SYSTEM

DENSITY BASED TRAFFIC CONTROL SYSTEM

DENSITY BASED TRAFFIC CONTROL SYSTEM

DENSITY BASED TRAFFIC CONTROL SYSTEM

DENSITY BASED TRAFFIC CONTROL SYSTEM

DENSITY BASED TRAFFIC CONTROL SYSTEM

DENSITY BASED TRAFFIC CONTROL SYSTEM

DENSITY BASED TRAFFIC CONTROL SYSTEM

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DENSITY BASED TRAFFIC CONTROL SYSTEM

DENSITY BASED TRAFFIC CONTROL SYSTEM

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DENSITY BASED TRAFFIC CONTROL SYSTEM

DENSITY BASED TRAFFIC CONTROL SYSTEM

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DENSITY BASED TRAFFIC CONTROL SYSTEM

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DENSITY BASED TRAFFIC CONTROL SYSTEM

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DENSITY BASED TRAFFIC CONTROL SYSTEM

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DENSITY BASED TRAFFIC CONTROL SYSTEM

DENSITY BASED TRAFFIC CONTROL SYSTEM

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DENSITY BASED TRAFFIC CONTROL SYSTEM

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DENSITY BASED TRAFFIC CONTROL SYSTEM

DENSITY BASED TRAFFIC CONTROL SYSTEM

DENSITY BASED TRAFFIC CONTROL SYSTEM

DENSITY BASED TRAFFIC CONTROL SYSTEM

DENSITY BASED TRAFFIC CONTROL SYSTEM

DENSITY BASED TRAFFIC CONTROL SYSTEM