UNIT I VLSI DESIGN METHODOLOGIES

Syllabus:
Introduction to VLSI Design methodologies - Review of Data structures and
algorithms -Review of VLSI Design automation tools - Algorithmic Graph
Theory and omputational omple!ity - Tracta"le and Intracta"le pro"lems -
general purpose methods for com"inatorial optimi#ation$
Objective:
To understand the VLSI design methodologies and to various design
automation tools$

Session
No.
Topics to be covee! Ti"e #e$ Teac%in&
Met%o!
% Introduction to VLSI Design methodologies &'m %(%-)* ++,--T
. Review of Data structures and algorithms &'m %()- &*
.(/-0*
++,--T
) Review of VLSI Design automation tools &'m %(%%-%1*
.(2-%%*
++,- -T
3 Algorithmic Graph Theory &'m %(.%-.3*
.(..-.3*
++,--T
& omputational omple!ity &'m %(3%-3.* ++,--T
/ Tracta"le pro"lems &'m %(3.-33*
.(.2-.1*
++,--T
0 Intracta"le pro"lems &'m %(33-&'* ++,--T
2 General purpose methods for com"inatorial
optimi#ation$
&'m %(&)-01* ++,--T
1 General purpose methods for com"inatorial
optimi#ation (cont$*
&'m %(&)-01* ++,--T
UNIT II DESIGN #ULES
Syllabus:
Layout ompaction - Design rules - pro"lem formulation - algorithms for
constraint graph compaction - placement and partitioning - ircuit
representation 4 -lacement algorithms 4 partitioning
5"6ective7
To understand the various design rules8 Sym"olic layout and onstraint-graph
compaction$

Session
No. Topics to be covee! Ti"e #e$
Teac%in&
Met%o!
%' Layout ompaction &'m %(2)-23*
.()%-)/*
++,--T
%% Design rules &'m %(23-2&*
.()/-3/*
++,--T
%. pro"lem formulation &'m %(2/-1'* ++,--T
%) algorithms for constraint graph
compaction
&'m %(1%-10*
.(/&-0)*
++,--T
%3 algorithms for constraint graph
compaction
&'m %(1%-10*
.(/&-0)*
++,--T
%& placement and partitioning &'m %(%'%-%'.*
.(%'0-%'1*
++,--T
%/ ircuit representation &'m %(%'.-%'&* ++,--T
%0 -lacement algorithms &'m %(%'/-%%'*
.(%%.-%%1*
++,--T
%2 partitioning &'m %(%%.-%%2*
.(%0)-%2.*
++,--T
UNIT III 'LOO# (L)NNING
Syllabus:
9loor planning concepts - shape functions and floor plan si#ing - Types of local
routing pro"lems - Area routing - channel routing - glo"al routing - algorithms
for glo"al routing$
Objective:
To understand the concepts of floor planning and various routing
algorithms$

Session
No.
Topics to be covee! Ti"e #e$ Teac%in&
Met%o!
%1 9loor planning concepts &'m %(%%1-%.3* ++,--T
.' shape functions &'m %(%.&-%./*
.(%2)-.2/*
++,--T
.. floor plan si#ing %''m %(%./-%.1*
.(.2/-.21*
++,--T
.) Types of local routing
pro"lems
&'m %(%))-%)3 *
.(%1)-%13*
++,--T
.& Area routing %''m %(%)3-%)& *
.(%1&-%12*
++,--T
./ channel routing &'m %(%)2-%3/*
.(.''-.'1*
++,--T
.0 glo"al routing &'m %(%&'-%&)* ++,--T
.2 Algorithms for glo"al
routing$
&'m %(%&3-%/)*
.(.%'-.%.*
++,--T
UNIT IV SIMUL)TION
Syllabus:
Simulation - Gate-level modeling and simulation - Switch-level modeling and
simulation - om"inational Logic Synthesis - +inary Decision Diagrams - Two
Level Logic Synthesis$
Objective: To introduce the fundamental concepts of various modeling and simulations and
synthesis$

Session
No.
Topics to be covee! Ti"e #e$ Teac%in&
Met%o!
.1 Simulation &'m %(%/0-%/2* ++,--T
)' Gate-level modeling &'m %(%0%* ++,--T
)% Switch-level modeling &'m %(%0'* ++,--T
). Gate-level modeling simulation &'m %(%/1-%0/* ++,--T
)) Switch-level modeling simulation &'m %(%2'-%2)* ++,--T
)3 om"inational Logic Synthesis &'m %(%1&-%11* ++,--T
)& +inary Decision Diagrams &'m %(.'%-.%1* ++,--T
)/ Two Level Logic Synthesis &'m %(...-..&* ++,--T
)0 Two Level Logic Synthesis &'m %(...-..&* ++,--T
UNIT V MODELLING )ND S*NTHESIS
Sylla"us7
:igh level Synthesis - :ardware models - Internal representation - Allocation -
assignment and scheduling - Simple scheduling algorithm - Assignment
pro"lem 4 :igh level transformations$
Objective:
To understand the concept of various synthesis and scheduling algorithm in AD VLSI$
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Session
No.
Topics to be covee! Ti"e #e$ Teac%in&
Met%o!
)2 :igh level Synthesis &'m %(.)&-.)0* ++,--T
)1 :ardware models &'m %(.)0-.)2* ++,--T
3' Internal representation %''m %(.)1-.3&* ++,--T
3. Allocation &'m %(.30-.&%* ++,--T
33 assignment and scheduling %''m %(.30-.&%* ++,--T
3/ Simple scheduling algorithm %''m %(.&)-./'* ++,--T
32 Assignment pro"lem &'m %(./%-./&* ++,--T
&% :igh level transformations &'m %(.//-.0'* ++,--T
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