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ahb-ip

ahb-ip

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Published by Vivek
AHB Proto
AHB Proto

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Published by: Vivek on Jun 05, 2014
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Design of an AMBA-Advanced High performance Bus (AHB) Protocol IP Block
Design of an AMBA-Advanced High performance Bus (AHB) Protocol IP Block
 Design and Verification of a Bus Bridge from OCP to AHB
1
 
Design of an AMBA-Advanced High performance Bus (AHB) Protocol IP Block
Abstract
he AHB (Advanced High-performance Bus) is a high-performance !us in AMBA (Advanced Microcontroller Bus Architecture) famil"# his AHB can !e used in high clock fre$uenc" s"stem modules# he AHB acts as the high-performance s"stem !ack!one !us# AHB supports the efficient connection of processors% on-chip memories and off-chip e&ternal memor" interfaces 'ith lo'-po'er peripheral macro cell functions# AHB is a technolog"-independent and ensure that highl" reusa!le peripheral and s"stem macro cells can !e migrated across a diverse range of I processes and !e appropriate for full-custom% standard cell and gate arra" technologies# enerall"% an AMBA-!ased microcontroller t"picall" consists of a high-performance s"stem !ack!one !us (AMBA AHB)% a!le to sustain the e&ternal memor" !and'idth% on 'hich the P*% on-chip memor" and other Direct Memor" Access (DMA) devices reside#In this 'ork% the design of the Advanced High-Performance Bus Protocol is developed 'hich has the !asic !locks such as Master and +lave# he ar!itration mechanism is used to ensure that onl" one master has access to the !us at an" one time and the AHB decoder is used to decode the address of each transfer and provide a select signal for the slave that is involved in the transfer# his AMBA-AHB protocol can !e adopted in all the application provided the design should !e an AHB compliant#
 Design and Verification of a Bus Bridge from OCP to AHB
,
 
Design of an AMBA-Advanced High performance Bus (AHB) Protocol IP Block
Chapter 1–Introduction
1.1 Aim
he main aim of this 'ork is to design an AMBA (Advanced Microcontroller Bus Architecture) AHB (Advanced High-Performance Bus) protocol and verif"ing it functional !ehavior 'ith the help of its simulation results#
1.2 Basic Idea
Basic idea is to perform the proper and lossless communication !et'een the IP cores 'hich using same protocols on the +"stem on hip (+.) s"stem# Basicall"% an +. is a s"stem 'hich is considered as a set of components and interconnects among them# he dataflo' 'ill happen in the s"stem in order to achieve a successful process and hence for 'hich the various interfaces is re$uired# If these interfaces have issues% then the process to !e achieved 'ill fail 'hich leads to fail of 'hole application# enerall"% in an +. s"stem% the protocols can !e used as interfaces 'hich 'ill !e !ased on the application and also the designer# he interface has its o'n properties 'hich suits for the corresponding application#
1.3 Need for Project
his pro/ect is chosen !ecause currentl" the issues are increased in the industries due to the lack of proper data transferring !et'een the IP cores on the +"stem on hip (+.) s"stem# In recent da"s% the development of +. chips and the reusa!le IP cores are given higher priorit" !ecause of its less cost and reduction in the period of ime-to-Market# +o this ena!les the ma/or and ver" sensitive issue such as interfacing of these IP cores# hese interfaces pla" a vital role in +.and should !e taken care !ecause of the communication !et'een the IP cores propert"# he communication !et'een the different IP cores should have a lossless data flo' and should !e fle&i!le to the designer too#
 Design and Verification of a Bus Bridge from OCP to AHB
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