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Table Of Contents

Microcoded Microarchitecture
A Bus-based Datapath for RISC
Agenda
Unpipelined Datapath for MIPS
Simplified Unpipelined Datapath
Pipelined Datapath
CPI Examples
Technology Assumptions
Pipeline Diagrams
Pipeline Diagrams: Space vs. Time
Overview of Structural Hazards
Overview of Data Hazards
Example Data Hazard
Feedback to Resolve Hazards
Resolving Data Hazards with Stalls
Stalled Stages and Pipeline Bubbles
Stall Control Logic
Source & Destination Registers
Deriving the Stall Signal
Hazards due to Loads & Stores
Adding Bypassing to the Datapath
Deriving the Bypass Signal
The Bypass Signal
Fully Bypassed Datapath
Control Hazards
Opcode Decoding Bubble
Speculate next address is PC+4
Pipelining Jumps
Jump Pipeline Diagrams
New Stall Signal
Reducing Branch Penalty
Other Control Hazards
Acknowledgements
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Comparch 002 Lecture Slides SD2 XAek1vrBgk (2)

Comparch 002 Lecture Slides SD2 XAek1vrBgk (2)

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Published by hafizuddinsyed
Computer Architecture
Computer Architecture

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Published by: hafizuddinsyed on Jun 24, 2014
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