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Published by: api-26072581 on Dec 03, 2009
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Enhancing Performance
with Pipelining
CSE 313
Pipeline motivation
\ue000Need both low CPI and high frequency for
best performance
\ue001Want a multicycle for high frequency, but need better
\ue000Idea behind pipelining is to have a
multicycle implementation that operates
like a factory assembly line
\ue000Each \u201cworker\u201d in the pipeline performs a
particular task, hands off to the next
\u201cworker\u201d, while getting new work
Pipeline motivation
\ue000Tasks should take about the same time \u2013 if
one \u201cworker\u201d is much slower than the rest,
then other \u201cworkers\u201d will stand idle
\ue000Once the assembly line is full, a new
\u201cproduct\u201d (instruction) comes out of the
back-end of the line each time period
\ue000In a computer assembly line (pipeline),
each task is called a stage and the time
period is one clock cycle

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