Welcome to Scribd, the world's digital library. Read, publish, and share books and documents. See more
Download
Standard view
Full view
of .
Look up keyword
Like this
26Activity
0 of .
Results for:
No results containing your search query
P. 1
Semiconductor Memory Design

Semiconductor Memory Design

Ratings: (0)|Views: 733|Likes:
Published by zar_grig
8.1 Introduction
8.2 MOS Decoders
8.3 Static RAM Cell Design
8.4 SRAM Column I/O Circuitry
8.5 Memory Architecture
8.6 Summary
References
Problems
8.1 Introduction
8.2 MOS Decoders
8.3 Static RAM Cell Design
8.4 SRAM Column I/O Circuitry
8.5 Memory Architecture
8.6 Summary
References
Problems

More info:

Published by: zar_grig on Dec 22, 2009
Copyright:Attribution Non-commercial

Availability:

Read on Scribd mobile: iPhone, iPad and Android.
download as PDF, TXT or read online from Scribd
See more
See less

03/23/2014

pdf

text

original

 
Semiconductor Memory Design
359
CHAPTER
8
CHAPTER OUTLINE
8.1Introduction8.2MOS Decoders8.3Static RAM Cell Design8.4SRAM Column I/O Circuitry8.5Memory Architecture8.6SummaryReferencesProblems
8.1Introduction
Modern digital systems require the capability ofstoring and retrieving largeamounts ofinformation at high speeds.
Memories 
are circuits or systems that storedigital information in large quantity.This chapter addresses the analysis and designofVLSI memories,commonly known as
semiconductor memories 
.Today,memory circuits come in different forms including SRAM,DRAM,ROM,EPROM,E
2
PROM,Flash,and FRAM.While each form has a different cell design,the basicstructure,organization,and access mechanisms are largely the same.In this chap-ter,we classify the different types ofmemory,examine the major subsystems,andfocus on the static RAM design issues.This topic is particularly suitable for ourstudy ofCMOS digital design as it allows us to apply many ofthe concepts pre-sented in earlier chapters.Recent surveys indicate that roughly 30% ofthe worldwide semiconductor busi-ness is due to memory chips.Over the years,technology advances have been drivenby memory designs ofhigher and higher density.Electronic memory capacity indigital systems ranges from fewer than 100 bits for a simple function to standalonechips containing 256Mb (1 Mb
2
10
bits) or more.
1
Circuit designers usually 
1
Recently,a memory chip with 1 Gbit ofdata storage capacity has been announced.
 
speak ofmemory capacities in terms ofbits,since a separate flip-flop or other sim-ilar circuit is used to store each bit.On the other hand,system designers usually statememory capacities in terms of 
bytes 
(8 bits);each byte represents a single alphanu-meric character.Very large scientific computing systems often have memory capac-ity stated in terms of 
words 
(32 to 128 bits).Each byte or word is stored in a partic-ular location that is identified by a unique numeric
address 
.Memory storagecapacity is usually stated in units ofkilobytes (K bytes) or megabytes (M bytes).Because memory addressing is based on binary codes,capacities that are integralpowers of2 are most common.Thus the convention is that,for example,1K byte
1,024 bytes and 64K bytes
65,536 bytes.In most memory systems,only a singlebyte or word at a single address is stored or retrieved during each cycle ofmemory operation.
Dual-port 
memories are also available that have the ability to read/writetwo words in one cycle.
8.1.1Memory Organization
The preferred organization for most large memories is shown in Figure 8.1.Thisorganization is a
random-access 
architecture.The name is derived from the fact thatmemory locations (
addresses 
) can be accessed in random order at a fixed rate,inde-pendent ofphysical location,for reading or writing.The storage array,or
core 
,ismade up ofsimple cell circuits arranged to share connections in horizontal rowsand vertical columns.The horizontal lines,which are driven only from outside thestorage array,are called
wordlines 
,while the vertical lines,along which data flow intoand out ofcells,are called
bitlines 
.A cell is accessed for reading or writing by selecting its row and column.Eachcell can store 0 or 1.Memories may simultaneously select 4,8,16,32,or 64 columns
360
ANALYSIS AND DESIGN OF DIGITAL INTEGRATED CIRCUITS
...
 ... ...
...
   R  o  w   d  e  c  o   d  e  r   R  o  w  a   d   d  r  e  s  s
Column decoder/MUXCell arrayColumn address111
n
1
m
Data2
m
2
n
Wordlines"CORE"2
n
 
×
2
m
CellBitlines
Figure 8.1
Organization of memory systems.
 
in one row depending on the application.The row and column (or group of columns) to be selected are determined by decoding binary address information.For example,an
n
-bit
decoder 
for row selection,as shown in Figure 8.1,has 2
n
out-put lines,a different one ofwhich is enabled for each different
n
-bit input code.Thecolumn decoder takes
m
inputs and produces 2
m
bitline access signals,ofwhich1,4,8,16,32,or 64 may be enabled at one time.The bit selection is done using amultiplexer circuit to direct the corresponding cell outputs to data registers.Intotal,2
n
2
m
cells are stored in the core array.An overall architecture ofa 64Kb random-access memory is shown in Figure8.2.For this example,
n
m
8.Therefore,the core array has a total of65,536cells.The memory uses a 16-bit address to produce a single bit output.Memory cell circuits can be implemented in a wide variety ofways.In princi-ple,the cells can be based on the flip-flop designs listed in Chapter 5 since theirintended function is to store bits ofdata.However,these flip-flops require a sub-stantial amount ofarea and are not appropriate when millions ofcells are needed.
SEMICONDUCTOR MEMORY DESIGN
361
n
= 8
m
= 82
m
= 2562
m
Row decoderAddressinputColumn pull-ups
   2
     n
   =   2   5   6
BitlineColumndecoderWordlineRead/writeRead/writecontrolData in Data outSense enWrite enColumn MUXSense amplifierWrite driver
Figure 8.2
Overall architecture of memory design.

Activity (26)

You've already reviewed this. Edit your review.
Sahil Qaiser liked this
1 thousand reads
1 hundred reads
Nitin Jain liked this
Sanjay Gaikwad liked this
akgn92 liked this
Адam Фapat liked this
Raza Ali Raza liked this
Binh Nguyen liked this
Binh Nguyen liked this

You're Reading a Free Preview

Download
scribd
/*********** DO NOT ALTER ANYTHING BELOW THIS LINE ! ************/ var s_code=s.t();if(s_code)document.write(s_code)//-->