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 Microprocessor is

• A multi-purpose, programmable, clock-driven, register-based electronic


device
• A semiconductor device manufactured by using LSI technique, including
ALU, register arrays & control circuits on a single chip, also known as
MPU (microprocessor unit)

 Microprocessor does
• Read binary instructions from memory
• Communicate with all peripherals (memory & I/Os) using system bus
• Control the timing of information flow
• Perform the computing tasks specified in a program
 Key Components
 Microprocessor Memory
 Memory
Micro-
 Input Input
processor
 Output
Output
 Terminologies
 Hardware: physical components of the system
 Program: a set of instructions written for the microprocessor to perform a
task
 Software: a group of programs
 Operating System: A set of programs to interact between the software and
the hardware through the user
 Bit
• Abbreviation for the term “binary digit”
• 0: low, 1: high
Word
• A group of bits that microprocessor recognizes & processes at a
time
• Microprocessors are classified according to the word length
(Example: 8-bit microprocessors employs a word length of 8
bits)
Nibble
• A group of 4 bits
 The first microprocessor, Intel 4004, a 4-bit PMOS microprocessor
was introduced in the year 1971 by Intel Corporation, U.S.A..
 Then a 4-bit microprocessor Intel 4040, an enhanced version of Intel
4004 was developed.
 In 1972, Intel introduced the first 8-bit microprocessor, Intel 8008
using PMOS technology.
 In 1973, Intel introduced a more powerful and faster 8-bit NMOS
microprocessor Intel 8080.
 In 1975, Intel developed an improved 8-bit NMOS microprocessor,
Intel 8085 which uses only one +5V supply. It is an improved version
of Intel 8080.
 In 1978 Intel introduced a 16-bit microprocessor, Intel 8086.
 In 1985, first 32-bit microprocessor was developed by Intel 80386.
 Then came Pentium, 32-bit advanced processor in 1993.
 In 1998 Intel developed another 32-bit low cost processor Celeron
based on Pentium-Pro architecture.
 In 1999, Intel developed Pentium III.
COMPONENTS OF A MICROCOMPUTER:
Inside CPU(*)

(not included in a single chip)


CPU
Arithmetic
Logic Unit
(ALU)

Input Control Unit Output

Memory
• Microcomputer
– A computer with a microprocessor as its CPU
– It includes microprocessor, memory, and I/O (input/output)

• Microcontroller
– A device that includes microprocessor, memory, and I/O signal lies on a
single chip (fabricated using VLSI technology)

MPU
Micro-
processor
Memory I/O
as CPU
Input Output
Peripheral Devices
A/D Converter
Timer, Serial I/O
Memory

Microcomputer Block Diagram Microcontroller Block Diagram


– Microcomputer – a computer with a microprocessor
as its CPU. Includes memory, I/O etc.
– Microprocessor – silicon chip which includes ALU,
register circuits & control circuits
– Microcontroller – silicon chip which includes
microprocessor, memory & I/O in a single package.
 MACHINE LANGUAGE: Each machine has its own set of instructions
based on the design of its CPU or of its microprocessor. To communicate with
the computer, one must give instructions in binary language, which is called
Machine Language.
 ASSEMBLY LANGUAGE: It is difficult for most user to write programs
in sets of 0s and 1s. So computer manufacturers have devised English-like
words to represent binary instructions of a machine called Assembly
Language, which is machine specific.
 LOW LEVEL LANGUAGE: Machine language and Assembly language
are microprocessor specific and are both considered Low Level Language.
 HIGH LEVEL LANGUAGE: Programming languages that are intended
to be machine-independent are called High-Level Languages. Examples are
FORTRAN, BASIC, PASCAL, C,C++,JAVA etc.
 A program called Interpreter or Compiler accept English like
statements as their input, called SOURCE CODE. The Compiler or Interpreter
then translates it into OBJECT CODE compatible with the microprocessor
being used in the system.
 DIFFERENCE BETWEEN COMPILER AND INTEPRETER: The compiler
reads the entire program first and translates it into the object code that is
executed by the microprocessor. The Interpreter reads one instruction at a
time, produces its object code, and executes it before reading the next one.
MACHINE LANGUAGE
• Machine Language is
– A binary language, composed of 0s & 1s
– Specific to each computer
– Tedious & error-prone to recognize & write instructions
– Using Hex keys can be a little bit more effective; still got a problem

• 8085 Machine Language


– 8-bit word length
– Its instruction set (language) is designed by using various combination of
these 8 bits
– 246 different bit patterns, 74 different instructions
– Examples:
0011 1100: increments the number in the accumulator by 1
1000 0000: adds the number in the register called B to the number in the
acc.
keeps the sum in the acc.
Memory Subsystem Organization and
Interfacing

• Types of Memory
• CACHE MEMORY
• MAIN OR PRIMARY MEMORY
• SECONDARY OR AUXILIARY MEMORY
• ROM
• PROM (Programmable ROM)
• EPROM(Erasable PROM)
• EEPROM(Electrically Erasable PROM)
• Flash EEPROM
RAM
• Static RAM(SRAM)
• Dynamic RAM(DRAM)
Intel 8085 microprocessor family

• Intel 8085 had single 5 Volt power supply.


• It is a 40 pin I.C. package fabricated on a single LSI chip.
• Clock oscillator and system controller were integrated on the
chip.
• Its clock speed is about 3 MHz. The clock is about 320 ns. The
CPU included serial I/O port.
• It has 80 basic instructions and 246 op codes.

• It consists of three main sections:


 An arithmetic and logic unit.
 A timing and control unit.
 A set of registers.
• System Bus – wires connecting memory &
I/O to microprocessor
– Address Bus
• Unidirectional
• Identifying peripheral or memory location
– Data Bus
• Bidirectional
• Transferring data
– Control Bus
• Synchronization signals
• Timing signals
• Control signal
• Bus
BUS STRUCTURE IN 8085
Address bus signals, Data bus signals

 AD0-AD7, A8-A15
 16 address lines – 2 sets
 Most significant bits (A8-A15) – single directional
 Least significant bits (AD0-AD7) – bidirectional
○ Multiplexed with the bits of bi-directional data
bus
○ It is used as both address and data bus
Mp Communication And Bus Timings - 2
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back
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• A, B, C, D, E, H, and L
• BC, DE, and HL

• Program Counter
• Stack Pointer
_
 Status lines:
• IO/M
 Differentiate I/O and memory applications
 High – I/O
 Low – Memory
• S1, S0 – status signals, to indicate the type of
machine cycle in progress
_ _ __
 Control lines:
• RD, WR & INTA
 RD – data on the data bus to be read into processor
 WR – data on the data bus to be written to processor
 INTA – acknowledge an INTR interrupt
• Initiated signals
– Reset In – reset CPU
– Hold – suspend CPU operation
– Ready – CPU go into wait state, to sync with slower devices

• Signal acknowledgement
– Reset out – high once CPU is rest
– HLDA – acknowledges hold signal
 16 – Bit Registers

 Program Counter
○ A pointer to the next instruction to be executed
○ Contains the 16-bit memory address of the next instruction
○ Updated after processor has fetched the instruction

 Stack Pointer
○ Stack – an area in memory in which temporary info is stored
○ Stack – FILO (First In Last Out) basis
○ Holds the address of the top of the stack
 Flag Register
› 8 bit register – shows the status of the microprocessor
before/after an operation
› S (sign flag), Z (zero flag), AC (auxillary carry flag), P
(parity flag) & CY (carry flag)
D7 D6 D5 D4 D3 D2 D1 D0

S Z X AC X P X CY

› Sign Flag
 Used for indicating the sign of the data in the accumulator
 The sign flag is set if negative (1 – negative)
 The sign flag is reset if positive (0 – positive)
 Zero Flag
 Is set if result obtained after an operation is 0
 Is set following an increment or decrement operation of that
register
10110011
+ 01001101
---------------
1 00000000

 Carry Flag
 Is set if there is a carry or borrow from arithmetic operation

1011 0101 1011 0101


+ 0110 1100 - 1100 1100
--------------- ---------------
Carry 1 0010 0001 Borrow 1 1110 1001
 Auxiliary Carry Flag
 Is set if there is a carry out of bit 3

1011 0101
+ 0110 1100
---------------
1 0010 0001

 Parity Flag
 Is set if parity is even
 Is cleared if parity is odd
• Maskable Interrupts
– Microprocessor can ignore or delay interrupt request
• INTR – General purpose interrupt
• RST 5.5, RST 6.5, RST 7.5 – Restart interrupts, higher priorities

• Nonmaskable Interrupts
– Enabled by default
– Cannot be disabled
– Microprocessor must respond to it immediately
• TRAP – highest priority

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