School of Electrical and Computer Engineering
Implementation of digital filter by using FPGA
Author:Family name:Given name:
Date Supervisor Dr Yee Hong Leung, Dr Cesar Ortega-SanchezDegree
Bachelor of Engineering
Implementing hardware design in Field Programmable Gate Arrays (FPGAs) is a formidable task. Thereis more than one way to implement the digital FIR filter. Based on the design specification, careful choiceof implementation method and tools can save a lot of time and work. MatLab is an excellent tool to designfilters. There are toolboxes available to generate VHDL descriptions of the filters which reducedramatically the time required to generate a solution. Time can be spent evaluating differentimplementation alternatives. Computation algorithms are required that exploit the FPGA architecture tomake it efficient in terms of speed and/or area.
FPGAs, FIR Filter, Distributed Arithmetic
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