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Implementation of digital filter by using FPGA

Implementation of digital filter by using FPGA

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Published by isaac2008
Implementing hardware design in Field Programmable Gate Arrays (FPGAs) is a formidable task. There
is more than one way to implement the digital FIR filter. Based on the design specification, careful choice
of implementation method and tools can save a lot of time and work. MatLab is an excellent tool to design
filters. There are toolboxes available to generate VHDL descriptions of the filters which reduce
dramatically the time required to generate a solution. Time can be spent evaluating different
implementation alternatives. Computation algorithms are required that exploit the FPGA architecture to
make it efficient in terms of speed and/or area.
Implementing hardware design in Field Programmable Gate Arrays (FPGAs) is a formidable task. There
is more than one way to implement the digital FIR filter. Based on the design specification, careful choice
of implementation method and tools can save a lot of time and work. MatLab is an excellent tool to design
filters. There are toolboxes available to generate VHDL descriptions of the filters which reduce
dramatically the time required to generate a solution. Time can be spent evaluating different
implementation alternatives. Computation algorithms are required that exploit the FPGA architecture to
make it efficient in terms of speed and/or area.

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Published by: isaac2008 on Apr 20, 2008
Copyright:Attribution Non-commercial

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04/05/2013

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Department of Electrical and Computer SystemEngineering
Implementation of digital filter by using FPGA
byYishu Wang
 A thesis submitted for the degree of  Bachelor of Engineering in Computer Systems Engineering
 
 School of Electrical and Computer Engineering
Title:
Implementation of digital filter by using FPGA
Author:Family name:Given name:
Yishu WangWangYishu
 Date Supervisor Dr Yee Hong Leung, Dr Cesar Ortega-SanchezDegree
Bachelor of Engineering
 Option
Computer System
 Abstract
Implementing hardware design in Field Programmable Gate Arrays (FPGAs) is a formidable task. Thereis more than one way to implement the digital FIR filter. Based on the design specification, careful choiceof implementation method and tools can save a lot of time and work. MatLab is an excellent tool to designfilters. There are toolboxes available to generate VHDL descriptions of the filters which reducedramatically the time required to generate a solution. Time can be spent evaluating differentimplementation alternatives. Computation algorithms are required that exploit the FPGA architecture tomake it efficient in terms of speed and/or area.
Indexing Terms
FPGAs, FIR Filter, Distributed Arithmetic
 Good Average Poor Technical Work Report PresentationExaminer Co-Examiner 
 
YishuWang56 Lowan LoopKarawaraWestern Australia, 6152Friday, 10 June 2005Professor Syed Islam,Head of Department,Department of Electrical and Computer Engineering,Curtin University of Technology,Bentley, 6102, Australia.Dear Professor IslamIn order to partially satisfy the requirements for the Bachelor of Engineering inComputer Systems Engineering degree, I present the following thesis entitled“Implementation of digital filters by using FPGAs”. I declare that this thesis isentirely my own work except where credited otherwise.Yours sincerely,Yishu Wang

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