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FPGA Workshop User Manual Ver2

FPGA Workshop User Manual Ver2

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09/05/2010

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An Interactive Workshop
on
Field Programmable Gate Arrays(FPGAs)
21st – 23rd July 2009
Prepared by
Shahzad Asif
LecturerMS (System on Chip)Linköping UniversitySweden
Department of Electrical Engineering
COMSATS Institute of Information TechnologyChak Shahzad Campus, Islamabad.
 
An Interactive WorkshopAn Interactive WorkshopononField Programmable Gate Array (FPGA)Field Programmable Gate Array (FPGA)
Speaker: Shahzad AsifSpeaker: Shahzad AsifLecturer (EE Department)Lecturer (EE Department)MS(SystemMS(System--onon--Chip)Chip)LinkLinkööping University, Sweden.ping University, Sweden.
22
OutlineOutline
Introduction to FPGA and HDLsIntroduction to FPGA and HDLs
Xilinx Design FlowXilinx Design Flow
How the code is synthesized to hardwareHow the code is synthesized to hardware
Difference between synthesis andDifference between synthesis andimplementationimplementation
Coding in VHDLCoding in VHDL
33
Hardware Design ProcessHardware Design Process
Flow Graph, Pseudo Code, ..Design IdeaBehavioral DesignData Path DesignLogic DesignPhysical DesignManufacturingChip or BoardBus & Register Structure.Gate Wirelist, Netlist.Transistor List, Layout, ...
44
Why HDLs?Why HDLs?
ARCHITECTURE xyz OF comparator ISARCHITECTURE xyz OF comparator ISBEGINBEGINPROCESS(a,b,gt,eq,ltPROCESS(a,b,gt,eq,lt))BEGINBEGINIF a > b THENIF a > b THENa_gt_ba_gt_b<=<=11;;a_eq_ba_eq_b<=<=00;;a_lt_ba_lt_b<=<=00;;ELSIF a < b THENELSIF a < b THENa_gt_ba_gt_b<=<=00;;a_eq_ba_eq_b<=<=00;;a_lt_ba_lt_b<=<=11;;ELSIF a = b THENELSIF a = b THENa_gt_ba_gt_b<=<=00;;a_eq_ba_eq_b<=<=11;;a_lt_ba_lt_b<=<=00;;END IF;END IF;END PROCESS;END PROCESS;END xyz;END xyz;
1231231231231289128912312891 21 21231289123
abgteqlta_gt_ba_eq_ba_lt_b
55
Why HDLs?Why HDLs?
(Continued)(Continued)
It is evident from the previous examplethat how easy it is to specify hardwareusing
High-level language constructs.
HDLs are used to describe thearchitecture/behavior of an electronicsystems.
66
HDL AdvantagesHDL Advantages
TopTop--down design support.down design support.
Architecture test at a very early stage.Architecture test at a very early stage.
Technology independence.Technology independence.
Design reusability.Design reusability.
Synthesis. (EDA support)Synthesis. (EDA support)
Standard.Standard.
Easy understanding than schematics.Easy understanding than schematics.
Documentation.Documentation.
Higher productivity.Higher productivity.
Generic DesignsGeneric Designs
An Interactive Workshop on FPGAPage 2 of 66
 
77
HDL DisadvantagesHDL Disadvantages
No control for gate levelNo control for gate level
Logic implementation are inefficientLogic implementation are inefficient
Quality of synthesis varies from tool to toolQuality of synthesis varies from tool to tool
Synthesis not standardSynthesis not standard
88
Levels of design descriptionLevels of design description
Algorithmic levelRegister Transfer LevelLogic (gate) levelCircuit (transistor) levelPhysical (layout) level
Level of descriptionmost suitable for synthesis
99
designs must be sentfor expensive and timeconsuming fabricationin semiconductor foundrybought off the shelfand reconfigured bydesigners themselves
Two competing implementationTwo competing implementationapproachesapproaches
ASICA
pplication
S
pecific
I
ntegrated
C
ircuit
FPGAF
ield
P
rogrammable
G
ate
A
rray
designed all the wayfrom behavioral descriptionto physical layoutno physical layout design;design ends witha bitstreamusedto configure a device
1010
FPGAsFPGAsvs.vs.ASICsASICs
ASIC
s
FPGA
s
High performanceOff-the-shelfShort time to the marketLow development costsReconfigurabilityLow powerLow cost (but onlyin high volumes)
1111
Other FPGA AdvantagesOther FPGA Advantages
Manufacturing cycle for ASIC is veryManufacturing cycle for ASIC is verycostly, lengthy and engages lots ofcostly, lengthy and engages lots ofmanpowermanpower
Mistakes not detected at design time haveMistakes not detected at design time havelarge impact on development time and costlarge impact on development time and cost
FPGAs are perfect for rapid prototyping ofFPGAs are perfect for rapid prototyping ofdigital circuitsdigital circuits
Easy upgrades like in case of softwareEasy upgrades like in case of software
Unique applicationsUnique applications
reconfigurable computingreconfigurable computing
1212
FieldField--Programmable Device (FPD)Programmable Device (FPD)
A general term that refers to any type ofA general term that refers to any type ofintegrated circuit used for implementingintegrated circuit used for implementingdigital hardware, where the chip can bedigital hardware, where the chip can beconfigured by end user to realize differentconfigured by end user to realize differentdesigns.designs.
Another name for FPDs is ProgrammableAnother name for FPDs is ProgrammableLogic Devices (PLDs).Logic Devices (PLDs).
An Interactive Workshop on FPGAPage 3 of 66

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