Crusoe Processor 1
1. INTRODUCTION
Mobile computing has been the buzzword for quite a long time. Mobile computingdevices like laptops, webslates & notebook PCs are becoming commonnowadays. The heart of every PC whether a desktop or mobile PC is themicroprocessor. Several microprocessors are available in the market for desktopPCs from companies like Intel, AMD, Cyrix etc.The mobile computing market hasnever had a microprocessor specifically designed for it. The microprocessorsused in mobile PCs are optimized versions of the desktop PC microprocessor.Mobile computing makes very different demands on processors than desktopcomputing, yet up until now, mobile x86 platforms have simply made do with thesame old processors originally designed for desktops. Those processorsconsume lots of power, and they get
very
hot. When you're on the go, a power-hungry processor means you have to pay a price: run out of power before you'vefinished, run more slowly and lose application performance, or run through theairport with pounds of extra batteries. A hot processor also needs fans to cool it;making the resulting mobile computer bigger, clunkier and noisier. A newlydesigned microprocessor with low power consumption will still be rejected by themarket if the performance is poor. So any attempt in this regard must have aproper
'
performance-power
'
balance to ensure commercial success. A newlydesigned microprocessor must be fully x86 compatible that is they should run x86applications just like conventional x86 microprocessors since most of thepresently available software’s have been designed to work on x86 platform.
Crusoe
is the new microprocessor which has been designed specially for themobile computing market. It has been designed after considering the abovementioned constraints. This microprocessor was developed by a small SiliconValley startup company called Transmeta Corp. after five years of secret toil at anexpenditure of $100 million. The concept of Crusoe is well understood from thesimple sketch of the processor architecture, called 'amoeba’. In this concept, thex86-architecture is an ill-defined amoeba containing features like segmentation,ASCII arithmetic, variable-length instructions etc. The amoeba explained how atraditional microprocessor was, in their design, to be divided up into hardware andsoftware.
Dept. of Computer Science and Engineering MES College of Engineering
Crusoe Processor 2
Thus Crusoe was conceptualized as a hybrid microprocessor that is it has asoftware part and a hardware part with the software layer surrounding thehardware unit. The role of software is to act as an emulator to translate x86binaries into native code at run time. Crusoe is a 128-bit microprocessor fabricated using the CMOS process. The chip's design is based on a techniquecalled VLIW to ensure design simplicity and high performance. Besides this it alsouses Transmeta's two patented technologies, namely, Code Morphing Softwareand Longrun Power Management. It is a highly integrated processor available indifferent versions for different market segments.
Technology Perspective
The Transmeta designers have decoupled the x86 instruction set architecture(ISA) from the underlying processor hardware, which allows this hardware to bevery different from a conventional x86 implementation. For the same reason, theunderlying hardware can be changed radically without affecting legacy x86software: each new CPU design only requires a new version of the CodeMorphing software to translate x86 instructions to the new CPU’s nativeinstruction set. For the initial Transmeta products, models TM3120 and TM5400,the hardware designers opted for minimal space and power. By eliminatingroughly three quarters of the logic transistors that would be required for an all-hardware design of similar performance, the designers have likewise reducedpower requirements and die size. However, future hardware designs canemphasize different factors and accordingly use different implementationtechniques. Finally, the Code Morphing software which resides in standard FlashROMs itself offers opportunities to improve performance without altering theunderlying hardware.
Dept. of Computer Science and Engineering MES College of Engineering
Crusoe Processor 3Dept. of Computer Science and Engineering MES College of Engineering
Microcode
Silicon MicrochipInteger UnitsFloating Point UnitMultimedia UnitData CacheInstruction Cache
C o m p l e xA d d r e s s i n g M o d e s
R e a l a n d P r o t e c t e d m o d e
Hardware: high-MHz, smalldisc size, non-x86, VLIWprocessor
SegmentationTrigonometricfunctionsMicrocode
Code MorphingSoftwareASCIIArithmetic
InstructionPrefixes
S u p e r c l a s s O u t - o f - o r d e r E x e c u t i o n
Variable-lengthInstruction
CRUSOE-“AMOEBA”
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