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An Efficient OFDM Transceiver Design suitable to IEEE 802.11a WLAN standard

An Efficient OFDM Transceiver Design suitable to IEEE 802.11a WLAN standard

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Published by ijcsis
In today’s advanced Communication technology one of the multicarrier modulations like Orthogonal Frequency Division Multiplexing (OFDM) has become broadened, mostly in the field of wireless and wired communications such as digital audio/video broadcast (DAB/DVB), wireless LAN (802.11a and HiperLAN2), and broadband wireless (802.16). In this paper we discuss an efficient design technique of OFDM transceiver according to the IEEE 802.11a WLAN standard. The various blocks of OFDM transceiver is simulated using ModelSimSE v6.5 and implemented in FPGA Xilinx Spartan-3E Platform. Efficient techniques like pipelining and strength reduction techniques are utilized to improve the performance of the system. This implementation results show that there is a remarkable savings in consumed power and silicon area. Moreover, the design has encouraged the reduction in hardware resources by utilizing the efficient reconfigurable modules.
In today’s advanced Communication technology one of the multicarrier modulations like Orthogonal Frequency Division Multiplexing (OFDM) has become broadened, mostly in the field of wireless and wired communications such as digital audio/video broadcast (DAB/DVB), wireless LAN (802.11a and HiperLAN2), and broadband wireless (802.16). In this paper we discuss an efficient design technique of OFDM transceiver according to the IEEE 802.11a WLAN standard. The various blocks of OFDM transceiver is simulated using ModelSimSE v6.5 and implemented in FPGA Xilinx Spartan-3E Platform. Efficient techniques like pipelining and strength reduction techniques are utilized to improve the performance of the system. This implementation results show that there is a remarkable savings in consumed power and silicon area. Moreover, the design has encouraged the reduction in hardware resources by utilizing the efficient reconfigurable modules.

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An Efficient OFDM Transceiver Design suitable toIEEE 802.11a WLAN standard
T.Suresh
Research Scholar, R.M.K Engineering CollegeAnna University, ChennaiTamilNadu, Indiafiosuresh@yahoo.co.in
Dr.K.L.Shunmuganathan
Professor & Head, Department of CSER.M.K Engineering College, KavaraipettaiTamilNadu, Indiakls_nathan@yahoo.com
 Abstract— 
In today’s advanced Communication technology one of the multicarrier modulations like Orthogonal Frequency DivisionMultiplexing (OFDM) has become broadened, mostly in the fieldof wireless and wired communications such as digital audio/videobroadcast (DAB/DVB), wireless LAN (802.11a and HiperLAN2),and broadband wireless (802.16). In this paper we discuss anefficient design technique of OFDM transceiver according to theIEEE 802.11a WLAN standard. The various blocks of OFDMtransceiver is simulated using ModelSimSE v6.5 andimplemented in FPGA Xilinx Spartan-3E Platform. Efficienttechniques like pipelining and strength reduction techniques areutilized to improve the performance of the system. Thisimplementation results show that there is a remarkable savings inconsumed power and silicon area. Moreover, the design hasencouraged the reduction in hardware resources by utilizing theefficient reconfigurable modules.
 Keywords-
FPGA
;
VHDL
;
OFDM
;
FFT
;
IFFT; IEEE 802.11a
 
I.
 
I
 NTRODUCTION
Wireless communications are evolving
 
towards the Multi-standard systems and other communication technologies, areutilizing the widely adopted Orthogonal Frequency DivisionMultiplexing (OFDM) technique, among the standards likeIEEE 802.11a&g for Wireless Local Area Networks (WLANs),Wi-Fi, and the growing IEEE802.16 for Metropolitan Access,Worldwide Interoperability for Microwave Access(WIMAX)[1]. The fast growth of these standards has helpedthe way for OFDM to be among the widely adopted standardsand to be the fundamental methods for the improvements of thenext generation telecommunication networks. In broadbandwireless communication, designers need to meet a number of critical requirements, such as processing speed, flexibility, andfast time to market. These requirements influence the designersin selecting both the targeted hardware platform and the design
Figure 1. OFDM point to point System
tool. Therefore, to support high data rates and computationalintensive operations, the underlying hardware platform musthave significant processing capabilities. FPGAs, here, promotes itself as a remarkable solution for developingwireless LAN (802.11a and HiperLAN2), and broadbandwireless systems (802.16) with their computationalcapabilities, flexibility and faster design cycle[2]. Therefore,to support high data rates and computational intensiveoperations, the underlying hardware platform must havesignificant processing capabilities. The aim of this paper is toimplement the reconfigurable architecture for the digital baseband part of an OFDM transceiver that conforms the802.11a standard
,
 by including 16 QAM modulator, FFT (FastFourier Transform) and IFFT (Inverse Fast Fourier Transform), serial to parallel and parallel to serial converter using hardware programming language VHDL (VHSICHardware Description Language). Moreover, this design isarea and power efficient by making the use of strengthreduction transformation technique that will reduce thenumber of multipliers used to perform the computation of FFT/IFFT processing.The paper is organized as follows: Section II describes theOFDM point to point system. Section III represents thesimulated methods of OFDM blocks and their results. SectionIV briefs about the pipelining process. Section V explains theFFT/IFFT implementation by using Strength Reductiontechnique. Section VI shows the implementation results andresource reductions. Section VII concludes the paper.Channel
Serial datainSerial dataoutModulation(16 QAM)Serial to parallelconverter IFFTParallel toserialconverter Cyclic prefixinsertionDemodulation(16 QAM)Parallel toserialconverter FFTSerial to parallelconverter Cyclic prefixremovalConvolutiondecoder Convolutionencoder 
(IJCSIS) International Journal of Computer Science and Information Security,Vol. 8, No. 2, May 2010118http://sites.google.com/site/ijcsis/ISSN 1947-5500
 
 
II.
 
O
FDM
P
OINT TO
P
OINT
S
YSTEM
 The simplest form of a point-to-point OFDM system could be considered as transmitter building blocks into the receiveside. It represents the basic building blocks that are used in both the transmission and reception sides as shown in Fig. 1.
 A.
 
Convolution Encoder 
Convolution encoder is used to create redundancy for the purpose of secured transmission of data. This helps the systemto recover from bit errors during the decoding process. The802.11a standard recommends to producing two output bits for each input. To achieve higher data rates, some of the redundant bits are removed after the encoding process is completed.
 B.
 
QAM Modulation
QAM (Quadrature Amplitude Modulation) is widely usedin many digital radio and data communications. It alsoconsiders the mixture of both amplitude and phase modulation.In this paper we used 16 bit QAM and is used to refer thenumber of points in constellation mapping. This is because of QAM achieves a greater distance between adjacent points inthe I/Q plane by distributing the points more evenly. By thisway the points in the constellation are distinct and due to this,data errors are reduced.
C.
 
 IFFT/FFT 
The key kernel in an OFDM transceiver is the IFFT/FFT processor. In WLAN standards it works with 64 carriers at asampling rate of 20 MHz, so a 64-point IFFT/FFT processor isrequired
.
The Fast Fourier Transform (FFT) and Inverse FastFourier Transform (IFFT) are derived from the main functionwhich is called Discrete Fourier Transform (DFT). The idea of using FFT/IFFT instead of DFT is that the computation can bemade faster where this is the main criteria for implementation.In direct computation of DFT the computation for N-point DFTwill be calculated one by one for each point. But for FFT/IFFT,the computation is done simultaneously and this method helpsto save lot of time, and so this is similar to pipeliningmethod[4].The derivation starts from the fundamental DFT equationfor an N point FFT. The equation of IFFT is given as shown in(1) and the equation of FFT is given as shown in (2)
{J 
#
{

  .
#("
(1)
{J{

  .
#("
(2)where the quantity

(called Twiddle Factor) is defined as

 
D$
π
EÈ4
(3)This factor is calculated and put in a table in order to make thecomputation easier and can run simultaneously. The TwiddleFactor table is depending on the number of points used. Duringthe computation of FFT, this factor does not need to berecalculated since it can refer to the Twiddle factor table, andthus it saves time.
Figure 2. 2 Point Butterfly structure
 D.
 
Strength Reduction Transformation
Fig. 2 shows the 2 point Butterfly structure wheremultiplication is performed with the twiddle factor after subtraction. Consider the problem of computing the product of two complex numbers R 
 
and WX = RW = (R 
+jR 
i
)(W
+jW
i
)
 
=(R 
W
-R 
i
W
i
)+j(R 
W
i
+R 
i
W
) (4)The direct architectural implementation requires a total of four multiplications and two real additions to compute thecomplex product as shown in (4). However, by applying theStrength Reduction transformation we can reformulate (4) asX
=(R 
-R 
i
)Wi+R 
(W
-W
i
) (5)X
i
=(R 
-R 
i
)W
i
+R 
i
(W
+W
i
) (6)It is clearly shown as given in (5) and (6), by using theStrength Reduction transformation the total number of realmultiplications is reduced to only three. This however is at theexpense of having three additional adders. So in this paper theabove discussed strength reduction transformation technique isused in the implementation of OFDM transceiver whilemultiplying the transmitted/received signal by twiddle factor.
Figure 3. Cyclic Prefix
W
 N
  baA=a+bB=(a-b)W
 N
 
(IJCSIS) International Journal of Computer Science and Information Security,Vol. 8, No. 2, May 2010119http://sites.google.com/site/ijcsis/ISSN 1947-5500
 
 
 E.
 
Cyclic Prefix
One of the most important properties of OFDMtransmission is its robustness against multi path delay. This isespecially important if the signal’s sub-carriers are to retaintheir orthogonality through the transmission process. Theaddition of a guard period between transmitted symbols can beused to accomplish this. The guard period allows time for multipath signals from the previous symbol to dissipate beforethe information from the current symbol gets recorded. Themost effective guard period is a cyclic prefix, which isappended at the front of every OFDM symbol. The cyclic prefix is a copy of the last part of the OFDM symbol, and is of equal or greater length than the maximum delay spread of thechannel as shown in Fig. 3.III.
 
S
IMULATED
M
ETHODS
A
 ND
ESULTS
 In this paper the simulated blocks of OFDM transceiver areexplained and the results were analyzed. The blocks those aresimulated using ModelSim SE v6.5 are given in Fig. 4. The blocks consist of OFDM transmitter which includes 16 QAMmodulator and IFFT and OFDM receiver which includes FFTand 16 QAM demodulator.In the initial stage the serial binary data value can beapplied to the transmitter block through convolution encoder for the purpose of secured data transmission and modulated bythe 16-QAM because of its advantageous compared to other modulations like BPSK, QPSK. An OFDM carrier signal isthe sum of a number of orthogonal sub-carriers, with basebanddata modulation (QAM) and it is demultiplexed into parallelstreams, and each one mapped to a complex symbol streamusing 16-QAM modulation.
Figure 4. Simulated Blocks of OFDM Transceiver 
An inverse FFT is computed on each set of symbols,delivering a set of complex symbols. The real and imaginarycomponents (I/Q) are used to modulate the cosine and sinewaves at the carrier frequency respectively, these signals aresummed to give the transmitted signal. The baseband signalsare sampled and passed through the OFDM receiver in FPGAand a forward FFT is used to convert back to the frequencydomain. This returns of 
 
 parallel streams, is converted to a binary stream using an 16-QAM demodulator. These are re-combined into a serial stream, is an estimate of the original binary stream at the transmitter. The cyclic prefix is used inOFDM Transceiver for the purpose of eliminating the ISI.This overall simulation part is done by ModelSim SE v6.5software with VHDL language and simulated results areshown in Fig. 5.
Figure 5. Simulated Results
IV.
 
P
IPELINE
P
ROCESS
 Each block in this architecture is designed and testedseparately, and later those blocks are assembled and extramodules are added to compose the complete system. Thedesign makes use of pipelining process and this is mainlyachieved through duplicating the memory elements likeregisters or RAMs in simulation function processing and it will buffer the incoming stream of bits while the previous stream is being processed. The design environment is completely basedon the Xilinx Integrated Software Environment (ISE) and
IFFTimgoutIFFTRealoutFFTimginRESETCLK QAMOUTQAMIN
OFDM Transceiver 
OFDM Receiver OFDM Transmitter Rectangular QAMmodulation
I
FFTFFTRectangular QAMdemodulation
 
FFTRealin
(IJCSIS) International Journal of Computer Science and Information Security,Vol. 8, No. 2, May 2010120http://sites.google.com/site/ijcsis/ISSN 1947-5500

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