Read without ads and support Scribd by becoming a Scribd Premium Reader.

See Premium Plans

Language:

Download

Go BackAdd Note

Link

Embed

Save for later

You're Reading a Free Preview
Pages 4 to 34 are not shown in this preview.

Buy the Full Version

You're Reading a Free Preview
Pages 38 to 54 are not shown in this preview.

Buy the Full Version

You're Reading a Free Preview
Pages 58 to 69 are not shown in this preview.

Buy the Full Version

You're Reading a Free Preview
Pages 73 to 151 are not shown in this preview.

Buy the Full Version

You're Reading a Free Preview
Pages 155 to 157 are not shown in this preview.

Buy the Full Version

Searching...

Result 00 of 00

00 results for result for

Spi IC Details

Download or Print

Add To Collection

3.4K

Reads

Readcasts

Embed Views

TIP Press Ctrl-F⌘F to search anywhere in the document.

Read without ads and support Scribd by becoming a Scribd Premium Reader.

See Premium Plans

Sections

1 INTRODUCTION
2 PIN DESCRIPTION
3 REGISTER & MEMORY MAP
4 FLASH PROGRAM MEMORY
4.2 Main Features
■Read-out protection
4.3 Structure
4.3.1 Read-out Protection
4.4 ICC Interface
4.5 ICP (In-Circuit Programming)
4.6 IAP (In-Application Programming)
4.7 Related Documentation
4.7.1 Register Description
5 CENTRAL PROCESSING UNIT
5.2 MAIN FEATURES
5.3 CPU REGISTERS
6 SUPPLY, RESET AND CLOCK MANAGEMENT
6.1 PHASE LOCKED LOOP
6.2 MULTI-OSCILLATOR (MO)
6.3 RESET SEQUENCE MANAGER (RSM)
6.3.1 Introduction
6.3.2 Asynchronous External RESET pin
6.3.3 External Power-On RESET
6.3.4 Internal Watchdog RESET
6.4 SYSTEM INTEGRITY MANAGEMENT
6.4.1 Register Description
7 INTERRUPTS
7.2 MASKING AND PROCESSING FLOW
7.3 INTERRUPTS AND LOW POWER MODES
7.4 CONCURRENT & NESTED MANAGEMENT
7.5 INTERRUPT REGISTER DESCRIPTION
7.6 EXTERNAL INTERRUPTS
7.6.1 I/O Port Interrupt Sensitivity
7.7 EXTERNAL INTERRUPT CONTROL REGISTER (EICR)
8 POWER SAVING MODES
8.2 SLOW MODE
8.3 WAIT MODE
8.4 ACTIVE-HALT AND HALT MODES
8.4.1 ACTIVE-HALT MODE
8.4.2 HALT MODE
9 I/O PORTS
9.2 FUNCTIONAL DESCRIPTION
9.2.1 Input Modes
9.2.2 Output Modes
9.2.3 Alternate Functions
9.3 I/O PORT IMPLEMENTATION
9.4 LOW POWER MODES
9.5 INTERRUPTS
9.5.1 I/O Port Implementation
10 ON-CHIP PERIPHERALS
10.1 WATCHDOG TIMER (WDG)
10.1.1 Introduction
10.1.2 Main Features
10.1.3 Functional Description
10.1.4 How to Program the Watchdog Timeout
10.1.5 Low Power Modes
10.1.6 Hardware Watchdog Option
10.1.7 Using Halt Mode with the WDG (WDGHALT option)
10.1.8 Interrupts
10.1.9 Register Description
10.2 MAIN CLOCK CONTROLLER WITH REAL TIME CLOCK AND BEEPER (MCC/RTC)
■a programmable CPU clock prescaler
10.2.1 Programmable CPU Clock Prescaler
10.2.2 Clock-out Capability
10.2.3 Real Time Clock Timer (RTC)
10.2.4 Beeper
10.2.5 Low Power Modes
10.2.6 Interrupts
10.2.7 Register Description
10.3 16-BIT TIMER
10.3.1 Introduction
10.3.2 Main Features
10.3.3 Functional Description
10.3.3.6 Pulse Width Modulation Mode
10.3.4 Low Power Modes
10.3.5 Interrupts
10.3.6 Summary of Timer modes
10.3.7 Register Description
10.4 SERIAL PERIPHERAL INTERFACE (SPI)
10.4.1 Introduction
10.4.2 Main Features
10.4.3 General Description
10.4.3.2 Slave Select Management
10.4.4 Clock Phase and Clock Polarity
10.4.5 Error Flags
10.4.6 Low Power Modes
10.4.7 Interrupts
10.4.8 Register Description
10.5 SERIAL COMMUNICATIONS INTERFACE (SCI)
10.5.1 Introduction
10.5.2 Main Features
10.5.3 General Description
10.5.4 Functional Description
10.5.5 Low Power Modes
10.5.6 Interrupts
10.5.7 Register Description
10.6 10-BIT A/D CONVERTER (ADC)
10.6.1 Introduction
10.6.2 Main Features
10.6.3 Functional Description
10.6.4 Low Power Modes
10.6.5 Interrupts
10.6.6 Register Description
11 INSTRUCTION SET
11.1 CPU ADDRESSING MODES
11.1.2 Immediate
11.1.3 Direct
11.1.4 Indexed (No Offset, Short, Long)
11.1.5 Indirect (Short, Long)
11.1.6 Indirect Indexed (Short, Long)
11.1.7 Relative mode (Direct, Indirect)
11.2 INSTRUCTION GROUPS
12 ELECTRICAL CHARACTERISTICS
12.1 PARAMETER CONDITIONS
12.1.1 Minimum and Maximum values
12.1.2 Typical values
12.1.3 Typical curves
12.1.4 Loading capacitor
12.1.5 Pin input voltage
12.2 ABSOLUTE MAXIMUM RATINGS
12.2.1 Voltage Characteristics
12.2.2 Current Characteristics
12.2.3 Thermal Characteristics
12.3 OPERATING CONDITIONS
12.3.1 Operating Conditions
12.4 SUPPLY CURRENT CHARACTERISTICS
12.4.1 CURRENT CONSUMPTION
12.4.2 Supply and Clock Managers
12.4.3 On-Chip Peripherals
12.5 CLOCK AND TIMING CHARACTERISTICS
12.5.1 General Timings
12.5.2 External Clock Source
12.5.3 Crystal and Ceramic Resonator Oscillators
12.5.4 PLL Characteristics
12.6 MEMORY CHARACTERISTICS
12.6.1 RAM and Hardware Registers
12.6.2 FLASH Memory
12.7 EMC CHARACTERISTICS
12.7.1 Functional EMS (Electro Magnetic Susceptibility)
12.7.2 Electro Magnetic Interference (EMI)
12.7.3 Absolute Maximum Ratings (Electrical Sensitivity)
12.8 I/O PORT PIN CHARACTERISTICS
12.8.1 General Characteristics
12.8.2 Output Driving Current
12.9 CONTROL PIN CHARACTERISTICS
12.9.1 Asynchronous RESET Pin
12.10 TIMER PERIPHERAL CHARACTERISTICS
12.10.1 16-Bit Timer
12.11 COMMUNICATION INTERFACE CHARACTERISTICS
12.11.1 SPI - Serial Peripheral Interface
12.12 10-BIT ADC CHARACTERISTICS
12.12.1 Analog Power Supply and Reference Pins
12.12.2 General PCB Design Guidelines
12.12.3 ADC Accuracy
13 PACKAGE CHARACTERISTICS
13.1 PACKAGE MECHANICAL DATA
13.2 THERMAL CHARACTERISTICS
13.3 SOLDERING INFORMATION
14 ST7232A DEVICE CONFIGURATION AND ORDERING INFORMATION
14.1 FLASH OPTION BYTES
14.2 ROM DEVICE ORDERING INFORMATION AND TRANSFER OF CUSTOMER CODE
14.3 VERSION-SPECIFIC SALES CONDITIONS
14.4 FLASH DEVICE ORDERING INFORMATiON
14.5 DEVELOPMENT TOOLS
14.5.1 Socket and Emulator Adapter Information
14.6 ST7 APPLICATION NOTES
15 KNOWN LIMITATIONS
15.1 ALL FLASH AND ROM DEVICES
15.1.1 Safe Connection of OSC1/OSC2 Pins
15.1.2 Unexpected Reset Fetch
15.1.3 Clearing active interrupts outside interrupt routine
15.1.4 16-bit Timer PWM Mode
15.1.5 SCI Wrong Break duration
15.1.6 39-Pulse ICC Entry Mode
15.2 ROM DEVICES ONLY
15.2.1 I/O Port A and F Configuration
15.2.2 External clock source with PLL
16 REVISION HISTORY

Info and Rating

Category:	Uncategorized.
Rating:
Upload Date:	07/23/2010
Copyright:	Attribution Non-commercial
Tags:	No tags

ebook download or readfalse online.

Flag for inappropriate content

Download and Print this Document

Read offline in your PDF viewer
Edit this document in Adobe Acrobat, Notepad
Keep a copy in case this version is deleted from Scribd
Read and print without ads
Email the file

Choose a format to download in

Download

Read without ads and support Scribd by becoming a Scribd Premium Reader.

See Premium Plans

Spi IC Details

Sections

Info and Rating

Download and Print this Document

Choose a format to download in

Choose a format to download in

Download and Print this Document

Choose a format to download in

Recommended

Other login options

Why Sign Up?

Login Successful

Sign Up Successful