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24C08B16B EEPROM

24C08B16B EEPROM

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Published by: arunan55 on Jul 29, 2010
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 ©
 1999 Microchip Technology Inc.DS21081F-page 1
 FEATURES
 Single supply with operation from 4.5-5.5VLow power CMOS technology-1 mA active current typical-10
µ
 A standby current typical at 5.5VOrganized as 4 or 8 blocks of 256 bytes(4 x 256 x 8) or (8 x 256 x 8)2-wire serial interface bus, I
 
2
 C
 
 compatibleSchmitt trigger, filtered inputs for noise suppres-sionOutput slope control to eliminate ground bounce100 kHz compatibilitySelf-timed write cycle (including auto-erase)Page-write buffer for up to 16 bytes2 ms typical write cycle time for page-writeHardware write protect for entire memoryCan be operated as a serial ROMESD protection > 4,000V1,000,000 ERASE/WRITE cycles guaranteedData retention > 200 years8-pin DIP, 8-lead or 14-lead SOIC packagesAvailable for extended temperature range
 DESCRIPTION
 The Microchip Technology Inc. 24C08B/16B is an 8K or16K bit Electrically Erasable PROM intended for use inextended/automotive temperature ranges. The deviceis organized as four or eight blocks of 256 x 8-bit mem-ory with a 2-wire serial interface. The 24C08B/16B alsohas a page-write capability for up to 16 bytes of data.The 24C08B/16B is available in the standard 8-pin DIPand both 8-lead and 14-lead surface mount SOIC pack-ages.-Commercial (C):0°Cto+70°C-Industrial (I):-40°Cto+85°C-Automotive (E):-40˚Cto+125˚C
 PACKAGE TYPESBLOCK DIAGRAM
NC
SSCC
A0A1NCA2NCV1234567141312NCSCLSDANC981110WPVNC
14-leadSOIC
2  4   C  0   8   /    1   6  2  4   C  0   8   /    1   6  
A0A1A2V
SS
12348765V
CC
WPSCLSDA
2  4   C  0   8   /    1   6  
A0A1A2V
SS
12348765V
CC
WPSCLSDA
PDIP8-leadSOIC
HV GENERATOREEPROMARRAYPAGE LATCHESYDECXDECSENSE AMPR/W CONTROLMEMORYCONTROLLOGICI/OCONTROLLOGICWPSDASCLV
CC
V
SS
 24C08B/16B
 8K/16K 5.0V I
 
2
 C
 
 Serial EEPROMs
 I
 
2
 C is a trademark of Philips Corporation.
 
 24C08B/16B
 DS21081F-page 2
 ©
 1999 Microchip Technology Inc.
 1.0ELECTRICAL CHARACTERISTICS
 1.1
 Maximum Ratings*
 V
 
CC
 ...................................................................................7.0VAll inputs and outputs w.r.t. V
 
SS
 ................-0.6V to V
 
CC
 +1.0VStorage temperature.....................................-65˚C to +150˚CAmbient temp. with power applied.................-65˚C to +125˚CSoldering temperature of leads (10 seconds).............+300˚CESD protection on all pins
 ..................................................≥
4 kV
 
*Notice:
 
Stresses above those listed under “Maximum ratings”may cause permanent damage to the device. This is a stress rat-ing only and functional operation of the device at those or anyother conditions above those indicated in the operational listingsof this specification is not implied. Exposure to maximum ratingconditions for extended periods may affect device reliability.
 TABLE 1-1:PIN FUNCTION TABLE
 NameFunction
 V
 
SS
 GroundSDASerial Address/Data I/OSCL Serial ClockWPWrite Protect InputV
 
CC
 +4.5V to 5.5V Power SupplyA0, A1, A2
 No Internal Connection
 TABLE 1-2:DC CHARACTERISTICSFIGURE 1-1:BUS TIMING START/STOP
 V
 
CC
 = +4.5V to +5.5VCommercial (C): Tamb = C to +70°CIndustrial (I): Tamb = -40°C to +85°CAutomotive (E): Tamb = -40˚C to +125˚C
 ParameterSymbolMinMaxUnitsConditions
 WP, SCL and SDA pins:High level input voltageV
 
IH
 .7 VccVLow Level input voltageV
 
IL
  .3 V
 
CC
 VHysteresis of Schmitt triggerinputsV
 
HYS
 .05 VccV(Note)Low level output voltageV
 
OL
  .40VI
 
OL
 = 3.0 mA, V
 
CC
 =4.5VInput leakage currentI
 
LI
 -1010
 µ
 AV
 
IN
 =.1V to V
 
CC
 Output leakage currentI
 
LO
 -1010
 µ
 AV
 
OUT
 = .1V to V
 
CC
 Pin capacitance(all inputs/outputs)C
 
IN
 , C
 
OUT
  10pFV
 
CC
 = 5.0V (Note 1)Tamb = 25˚C, F
 
CLK
 =1 MHzOperating currentI
 
CC
 writeI
 
CC
 read — —31mAmAV
 
CC
 = 5.5V, SCL = 400 kHzStandby currentI
 
CCS
  100
 µ
 AV
 
CC
 = 5.5V, SDA = SCL = V
 
CC
 WP = V
 
SS
 Note: This parameter is periodically sampled and not 100% tested.
T
SU
:
STA
T
HD
:
STA
V
HYS
T
SU
:
STO
 
STARTSTOPSCLSDA
 
 ©
 1999 Microchip Technology Inc.DS21081F-page 3
 24C08B/16B
 TABLE 1-3:AC CHARACTERISTICSFIGURE 1-2:BUS TIMING DATA
 ParameterSymbolMinMaxUnitsRemarks
 Clock frequencyF
 
CLK
  100kHzClock high timeT
 
HIGH
 4000nsClock low timeT
 
LOW
 4700nsSDA and SCL rise timeT
 
R
  1000ns(Note1)SDA and SCL fall timeT
 
F
  300ns(Note 1)START condition hold timeT
 
HD
 :
 
STA
 4000nsAfter this period the rst clockpulse is generatedSTART condition setuptimeT
 
SU
 :
 
STA
 4700nsOnly relevant for repeatedSTART conditionData input hold timeT
 
HD
 :
 
DAT
 0nsData input setup timeT
 
SU
 :
 
DAT
 250nsSTOP condition setup timeT
 
SU
 :
 
STO
 4000nsOutput valid from clockT
 
AA
  3500ns(Note 2)Bus free timeT
 
BUF
 4700nsTime the bus must be free beforea new transmission can startOutput fall time from V
 
IH
 min to V
 
IL
 maxT
 
OF
  250ns(Note 1), C
 
B
 
 100 pFInput filter spike suppres-sion (SDA and SCL pins)T
 
SP
  50ns(Note 3)Write cycle timeT
 
WR
  10msByte or Page modeEndurance1Mcycles25°C, V
 
CC
 = 5.0V, Block Mode(Note 4)Note1:Not 100% tested. C
 
B
 = total capacitance of one bus line in pF.2:As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of START or STOP conditions.3:The combined T
 
SP
 and V
 
HYS
 specifications are due to new Schmitt trigger inputs which provide improvednoise and spike suppression. This eliminates the need for a T
 
I
 specification.4:This parameter is not tested but guaranteed by characterization. For endurance estimates in a specific appli-cation, please consult the Total Endurance Model which can be obtained on our website.
T
SU
:
STA
T
F
T
LOW
T
HIGH
T
R
T
HD
:
DAT
T
SU
:
DAT
T
SU
:
STO
T
HD
:
STA
T
BUF
T
AA
T
AA
T
SP
T
HD
:
STA
SCLSDAINSDAOUT

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