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Published by xmen24
CS5272: Embedded Software systems
CS5272: Embedded Software systems

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Published by: xmen24 on Oct 02, 2007
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12/26/2011

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 ARMI/O, Exceptions, Interrupts
ua raNational University of Singapore
tulika@comp.nus.edu.sg
 
10/3/2007CS5272 © 2007 Tulika Mitra1
rogrammng – 
 
 
non-digital components
Diital interface to CPU: status & dataregisters
statusCPUreg
    c     h    a    n     i    s
aareg
m
10/3/2007CS5272 © 2007 Tulika Mitra2
rogrammng -
-
Address
 
-
Devices are mappedto specific memory
CPU
DataReadWrite
 
locations just likeRAM
MemoryI/O Device
 instructions just likeaccesses to memory
CPU
DataAddressMemory I/O
I/O mapped
Special bus line and
ReaWrite
I/O Port
10/3/2007CS5272 © 2007 Tulika Mitra3
 
MemoryI/O Device
egser ascs
I/O Registers are NOT like normal memory
 
Device events can change their values (e.g., status reg)
Reading a register can change its value (e.g., errorcondition reset
read
-
only (e.g., receive registers) , write
-
only (e.g.,transmit registers)
Clear from context
The bits in a control register often each specify something
--
 
Cache must be disabled for memory
-
mapped addresses
When polling I/O registers, should tell compiler that value
10/3/2007CS5272 © 2007 Tulika Mitra4
can cange on s own
 volatile int *ptr;
memory-mappe
Define location for device 
 
DEV1 EQU 0x1000
Read/write code
,LDR r0,[r1] ; read DEV1r, ; se up vaue o wreSTR r0,[r1] ; write value to device
10/3/2007CS5272 © 2007 Tulika Mitra5
emory-mappe : xampe
A device containing eight 8-bit registers at addresses0x00001000 –0x00001007
The decoder activates chip enable for this address range
Address bits A0—A2 are used for reister select
Example: storing the lowest byte of processor register r3 indevice register R2
=
 
,STR r3, [r1]
10/3/2007CS5272 © 2007 Tulika Mitra6
 
emory-mappe n
int eekchar *location{return *location; } void poke(char *location,char value){*location = value; }#define DEV1 0x1000dev_status = peek((char *)DEV1);poke((char *)DEV1, 8);
10/3/2007CS5272 © 2007 Tulika Mitra7
oae varae
 volatileint*status
 
 _ p_status = (int *) 0x4001;*== _ 
Compiler allocates (*p_status) to register
* _
Volatile keyword ensures that compiler willnot allocate it in reister and will not allow
 
it to be put in data cache
10/3/2007CS5272 © 2007 Tulika Mitra8
Processor has arallel buses for data
--
need to convert
xampe: era -
 
 
serial data to parallel (and vice versa)
UART
-
Universal asynchronous receiver and transmitter
Chip RegSelectR/W
Tx Clock 
ontro
Tx Data RegTx Shift RegIRQTx Datatatus egControl RegCTSRTSRxData
DataBusBuffers
D
0
-D
7
 
10/3/2007CS5272 © 2007 Tulika Mitra9
 Rx Clock  
- 
 
-
 
-
 
printf(“the number is %d\n”, someNumber);
-
 
printf()
is a library call which formats theoutput (e.g., converts
%d
formats) and thenmakes system call to output the formattedstring
characters
Low
-
level routines then output the string one character
10/3/2007CS5272 © 2007 Tulika Mitra10
 
oncepua ew o evce rver
 while (*string != '\0')*
 
Problem
•while
loop can execute a lot fasterthan the UART can transmit
Chip RegSelectR/W
Tx Clock 
ontro
Tx Data RegTx Shift RegIRQTx Data
 
Status RegControl RegCTSRTSDataBusD
0
-D
7
10/3/2007CS5272 © 2007 Tulika Mitra11
 
 
Rx Clock  
ec or space
 while (*string != '\0'){
strin
  printChar(*string++);}
Chip RegSelectR/WControl
Tx Clock Tx Data RegStatusReTx Shift RegIRQTx Data
 
12 Control RegRx Data RegRx Shift RegCTSRTSRx DataDataBusD
0
-D
7
10/3/2007CS5272 © 2007 Tulika Mitra12
Rx Clock 
 
usy-wa
current_char = mystring;*= _ poke(OUT_CHAR,*current_char);** 
 
 while (peek(OUT_STATUS) != 0);curren_car;}
 
10/3/2007CS5272 © 2007 Tulika Mitra13
eer opon: nerrup
When device is ready, it sends an interrupt 
nerrup
On an interrupt, CPU jumps to interrupt aner
Read/write of the device is done inside interrupt handler
timeuser programuser program
IRQ Interrupt handler
Task 
 
10/3/2007CS5272 © 2007 Tulika Mitra14
Interrupt
Normal Program Flow 
vs.
xceponsnerrups
 ,(with a few branches to make life interesting) ,
Exceptions and interrupts break the,architecturally
-
defined memory locations
10/3/2007CS5272 © 2007 Tulika Mitra15
xcepon
vs.
nerrup
 
floating point overflow
MMU fault (e.g., page fault)
 
trap (SWI)
Interrupt refers to an external I/O event
I/O device request
reset
ARM manual usually does not makedistinction between exception & interrupt
10/3/2007CS5272 © 2007 Tulika Mitra16
xcepons
10/3/2007CS5272 © 2007 Tulika Mitra17
rocessor oes
User: Normal roram execution 
 
unable to access protected system resourcesor change mode
Exception modes: Additional registers toavoid corrupting user mode
FIQ: fast interrupt for high-speed data transfer
IRQ: general-purpose interrupt handling 
upervsor: proece moe or
System: Supervisor mode but access to
10/3/2007CS5272 © 2007 Tulika Mitra18
 

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