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Voltage Flicker Mitigation with DynamicVoltage Restorer 
Arash Khoshkbar Sadigh, Seyed Hossein Hosseini, Mehdi Farasat, Ehsan Mokhtarpour 
Faculty of Electrical and Computer Engineering, University of Tabriz, Tabriz, Irana.khoshkbar.sadigh@gmail.com , hosseini@tabrizu.ac.ir , mehdi.farasat.ee@gmail.com , ehsan.mokhtarpour@gmail.com
 
 Abstract 
--This paper is concerned with a pre-flickercompensation strategy adopted by a dynamic voltage restorer(DVR) to mitigate voltage flicker in a power system. The DVR configuration based on flying capacitor multicell (FCM)converter is proposed to mitigate the voltage flicker because of taking the FCM converter advantages such as transformer-lessoperation and natural self-balancing of flying capacitorsvoltages. The proposed DVR consists of a series converter onthe source-side and a shunt rectifier on the load-side. Choosingthis configuration for DVR makes it possible that the shuntrectifier can maintain dc link voltage at a desired value whichresults in the proper performance of the DVR. Furthermore,the DVR reference voltages calculation method and also, thepre-flicker compensation strategy, which are based onsynchronous reference frame (SRF), are adopted as the controlstrategy. Simulation results, which are provided byPSCAD/EMTDC software, verify that the proposed detectionand determination methods are able to detect the voltageflickers and determine the three single-phase reference voltagesof DVR as fast as the DVR mitigates the voltage flickers.
 Index Terms
-
-
Dynamic Voltage Restorer, Voltage Flicker,Flying Capacitor Multicell Converter, Pre-FlickerCompensation Strategy
 
I.
 
IntroductionModern end-use equipment is very sensitive to voltagefluctuation and flicker. In many cases, mitigating the voltageflicker helps to prevent equipment malfunction. Flicker mitigation techniques depend on injecting a certain amountof reactive power defined by the difference between thereference value and the measured voltage. In literature, twocompensation strategies to mitigate the flicker phenomenoncan be found [1]. One strategy forces the activecompensators to supply the load with the oscillating part of the instantaneous imaginary power absorbed by it [1]. Theother strategy forces the active compensators to supply theload with the oscillating parts of both the instantaneousimaginary power and the instantaneous real power absorbed by it. The use of a DVR is one of the most effectivesolutions for “restoring” the quality of voltage at its load-side terminals when the quality of voltage at its source-sideterminals is disturbed [2]-[4].The FCM converter [5], [6], has many attractive properties for medium voltage applications including, in particular, the advantage of transformer-less operation andthe ability to naturally maintain the flying capacitorsvoltages at their target operating levels [7]. Because of mentioned properties, this paper deals with the configurationof DVR based on a 7-level FCM converter. It should benoted that FCM converter based DVR configuration for voltage flicker mitigation has not been proposed yet.In this paper, a configuration of DVR based on a 7-levelFCM converter is proposed to mitigate voltage flicker in a power system. The pre-flicker compensation strategy isapplied to DVR to compensate the voltage flickers and amethod based on synchronous reference frame (SRF) is proposed to detect the voltage flicker and determine thethree single-phase reference voltages of DVR which resultsin a good dynamic response time of the DVR. The proposedsystem configuration consists of a series converter on thesource-side and a shunt rectifier on the load-side. Thissystem configuration allows the use of an extremely smalldc capacitor because the dc capacitor does not play any rolein feeding electric energy to the series converter duringvoltage flicker compensation, but takes role in smoothingthe common dc-link voltage [2], [8].Simulation results are presented to validate theeffectiveness and advantages of the novel configuration of DVR and its proposed detection and determination methods.II.
 
Proposed FCM Converter Based DVR for VoltageFlicker MitigationA traditional DVR mainly consists of series and shuntconverters connected back-to-back and a common dccapacitor used as an energy-storage element. Fig. 1 showstwo different types of DVR configurations. Each consists of a set of shunt and series converters connected back-to-back and a common dc capacitor.The series converter consists of a three-phase voltage-source converter or three single-phase voltage-sourceconverters. It starts to inject three-phase compensatingvoltages in series into the power line as soon as voltageflicker occurs. It is noted that in Fig. 1(a), the shuntconverter is installed at the source-side [9], [10], whereas inFig. 1(b), it is installed at the load-side [2], [8]. In bothsystems, the shunt converter uses a three-phase dioderectifier that charges the dc capacitor in normal conditions.There exists a significant operational difference between theshunt converters in Figs. 1(a) and 1(b) during the occurrenceof voltage flickers. Suppose a voltage drop occurs at thesource-side or at the ac terminals of the shunt converter. In
1st Power Electronic & Drive Systems & Technologies Conference978-1-4244-5971-1/10/$26.00 ©2010 IEEE
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Fig. 1(a), the shunt converter loses its rectification capabilitywhen the maximal source voltage becomes lower than thedc-link voltage. Therefore, the series converter requires alarge dc capacitor as an energy-storage element intended for feeding active power to it. On the other hand, in Fig. 1(b),no voltage drop appears at the load-side or at the acterminals of the shunt converter when a voltage flicker occurs at the source-side because the series converter compensates the voltage flicker. This makes it possible tokeep the shunt converter active in regulating the dc link voltage, even for long-duration voltage flickers. In this case,the active power required for voltage flicker compensation isinjected from the shunt converter to the series converter. Inother words, the dc capacitor does not play any role infeeding active power required for compensation to the seriesconverter. This system configuration allows the use of anextremely small dc capacitor intended for smoothing thecommon dc-link voltage. Thus, the DVR in Fig. 1(b) canoperate properly independent of duration (long or short) of voltage flickers.In this paper, the configuration of DVR based on theFCM converter is proposed to increase the number of outputvoltage levels and as a results, reduce the output voltageTHD. A 7-level FCM converter is shown in Fig. 2. Inaddition to transformer-less operation and the natural self- balancing ability of FCM converter, redundancy in thenumber of combinations required to obtain a desired voltagelevel and reduction in the semiconductor losses are the other advantages of this converter [2], [7], [11]. Because of mentioned properties, in this paper a 7-level FCM converter,as shown in Fig. 4, is adopted for use in DVR. As shown inFig. 2, there are two dc capacitors for dc link of each single phase FCM converter, therefore for three single-phase FCMconverters, six dc capacitors are required. While, as shownin Fig. 4, in this configuration only one dc link is used for three single-phase FCM converters. As a result, the requireddc capacitors for dc link are decreased from six to two.For producing 7-level output voltage with the cascademulticell (CM) converter and only one dc link capacitor,which is obtained from shunt rectifier, it is essential to usethree CM converters for each phase. Also, because of existence of only one dc link capacitor, it is required to usethree isolation transformers for each phase. While in thesame conditions, using an FCM converter causes to reducethe number of isolation transformers for each phase fromthree to one. As a result, the cost and size of the DVR isdecreased.III.
 
Control Strategies
a)
 
 Flying Capacitor Multicell Converter Control Strategy
Self-balancing of the flying capacitors voltages occursnaturally without any feedback control. A necessarycondition for self-balancing is that the average flyingcapacitors currents must be zero. As a result, each cell must be controlled with the same duty cycle and a regular PhaseShifted Sinusoidal Pulse Width Modulation (PS-SPWM) inwhich the phase shift between the carriers of each cell is:
n
/ 2
π ϕ 
=
(1)
where,
n
is the number of cells. The PS-SPWM for the 7-level FCM converter is shown in Fig. 3 in which the
 M 
 symbol dedicates the modulation index.
Fig. 1. DVR configuration by installing the shunt converter at the: (a)source-side; (b) load-side.Fig. 2. Configuration of 7-level flying capacitor multicell converter.
Generally, an output RLC filter (balance booster circuit)is needed to accelerate the self-balancing process. This filter,which consists of a resistance, inductance and a capacitanceconnected in series, accelerates the self balancing processand is connected in parallel with the load. The output RLCfilter is tuned to the switching frequency as follows:
SW 
 f C  L
⋅⋅=⋅
π 
21
(2)
where,
 f 
SW 
is the switching frequency,
 L
and
C 
areinductance and capacitance of the output RLC filter.
Fig. 3. Phase shifted sinusoidal pulse width modulation for 7-level flyingcapacitor multicell converter.
b)
 
Voltage flickers Compensation Strategy
To avoid tripping of the load, the amplitude and phaseangle of the load voltage has to be restored by the DVR.Different strategies can be used to achieve this goal. Threebasic strategies are the pre-flicker compensation [2], [12],in-phase compensation [2], [13] and the energy-optimizedcompensation strategies [14], [15], [16].
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Fig. 4. Power circuit of the proposed DVR based on 7-level flying capacitor multicell converter for voltage flicker mitigation.
The standard solution for compensating voltagedisturbances is to restore the load exact voltage before thedisturbance. Therefore, the amplitude and the phase angle of the voltage before the flicker have to be exactly restored [2],[12]. The phasor diagram of the pre-flicker compensationstrategy is shown in Fig. 5. In this figure, the dashedquantities (
 grid 
V 
′
,
load 
V 
′
,
dvr 
V 
′
and
load 
 I 
′
) indicate variablesafter the flicker. The phasors prior to the flicker arerepresented by
 grid 
V 
,
load 
V 
and
load 
 I 
. This compensationstrategy leads to the lowest distortions at the load-side, because the amplitude and phase angle of the voltage at theload-side is not changed during the flicker. For this strategy,a phase-locked loop (PLL) is synchronized with the loadvoltage. As soon as a failure occurs, the PLL is locked andtherefore, the phase angle can be restored.
Fig. 5. Phasor diagram of the pre-flicker compensation strategy.
Depending on the phase angle of the grid voltage duringthe flicker, the DVR has to inject higher voltage amplitudeto restore the correct voltage magnitude, because the phase jump of the grid has also to be compensated by the DVR,therefore, the system has to be designed for the highest possible voltage possible voltage. This strategy is able tocompensate any kind of voltage flickers with or without any phase-variations in each grid phase voltages.In this paper, the pre-flicker compensation strategy isapplied to DVR; the main reasons are its mentionedadvantages, excellent performance particularly in the case of  phase jumps in the grid voltage and the ability of compensation for any kind of voltage flickers.IV.
 
Proposed Method for Determination of DVR ReferenceSeries Injected VoltageIn this paper, the SRF is proposed to detect the voltageflickers and also to determine the three single-phasereference voltages of DVR. As the first step, the line-neutralgrid voltages in the pre-flicker state are transferred from
abc
 coordinate system to SRF as follows:
=
⎥⎥⎥⎦⎤⎢⎢⎢⎣⎡
0,,,
 grid q grid d  grid 
V V V 
 
⎥⎥⎥⎦⎤⎢⎢⎢⎣⎡
⋅
⎥⎥⎥⎥⎥⎦⎤⎢⎢⎢⎢⎢⎣⎡
+−+−
c grid b grid a grid 
V V V t t t t t t 
,,,
212121)120sin()120sin()sin( )120cos()120cos()cos( 32
ω ω ω ω ω ω 
(3)
where,
a grid 
V 
,
,
b grid 
V 
,
,
c grid 
V 
,
are the measured line-neutral grid voltages of phases
a
,
b
and
c
, respectively and
d  grid 
V 
,
,
q grid 
V 
,
,
0,
 grid 
V 
are the
d 
-component,
q
-componentand
 zero
-component of grid voltages in the SRF,respectively.Then, the phase angle of phase
a
voltage in the pre-flicker state (healthy state) which results in nil value for 
 zero
-component of 
dq0
is stored as the reference phase as
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