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Table Of Contents

1.1 MOS integrated circuits
1.2 Compact MOSFET models for circuit analysis and design
Section 1.3 A brief history of compact MOS transistor models 3
1.3 A brief history of compact MOS transistor models
2.1 Equilibrium electron and hole concentrations
2.2 The field effect in bulk semiconductors
2.2.1 Fundamental considerations
2.2.2 Poisson-Boltzmann equation in bulk semiconductors [3], [4]
2.3 The ideal two-terminal MOS structure [8]
2.3.1 Small signal equivalent capacitive circuit
2.3.2 Ideal C-V plots
2.3.3 Effect of work function difference
2.3.4 The flat-band voltage
2.4.1 Quasi-equilibrium electron and hole concentrations
2.4.2 Surface potential master equation
2.4.3 Small signal equivalent capacitive circuit in inversion
2.4.4 Basic approximations for compact modeling
2.4.4.1 The charge-sheet approximation [23]
2.4.5 The pinch-off voltage
2.4.6 The unified charge control model (UCCM)
2.4.7 Comparison between charge-sheet model and UCCM
2.5.1 Interface-trap capacitance
2.5.2 Polysilicon depletion [12]
dc Equations
3.1 A brief history of MOSFET theory
3.2 MOSFET operation
3.4 Compact surface potential MOSFET models
3.7.3 Universal dc characteristics
3.7.4 Small-signal transconductances
3.7.5 The transconductance-to-current ratio
3.7.6 Small-signal MOSFET model at low frequencies
Bibliography
Problems
4.1 Effective mobility
4.2 Velocity saturation
4.3 Saturation charge and saturation voltage
4.4 Channel length modulation
4.5 Effect of source and drain series resistances
4.6 Ballistic transport
4.7 Short- and narrow-channel effects
4.7.1Short-channel effects
4.7.2Reverse short-channel effects
4.7.3Narrow-channel effects
4.7.4Drain-induced barrier lowering
4.8 Impact of small geometry effects on transistor model
4.9.1 Series-parallel association of transistors
4.9.2Gummel symmetry test
Stored Charges and Capacitive Coefficients
5.1 Transient analysis of the MOS transistor [1]
5.1.1 The continuity equation [6]
5.1.2 Definitions of source and drain charges [1]
5.2 Quasi-static charge-conserving model
5.2.1 Stored charges [4]
5.2.1.1 Symbolic MOSFET model
5.2.1.2 Stored charge calculations
5.2.2Transit time
5.2.3 Capacitive coefficients
5.2.3.1 Intrinsic small-signal models
5.2.3.2Calculation of the capacitive coefficients [9]
5.2.3.3Charge conservation and transcapacitances
5.2.3.4Intrinsic transition frequency
5.3 Charges and capacitances of the extrinsic transistor [6]
5.4 Small-dimension effects on charges and capacitances
5.4.1Effect of velocity saturation on stored charges
5.4.2Effect of velocity saturation on capacitances
5.4.3Other small-dimension effects on capacitances
6.1 Introduction
6.2 Random mismatch in MOS transistors
6.3 Consistent model for drain current fluctuation
6.4 Number fluctuation mismatch model
6.5 Specific current mismatch
6.6 Mismatch model in terms of inversion level
6.7 Experimental results and discussion [25], [26]
7.1 Sources of noise
7.1.1 Thermal noise
7.1.2 Shot noise
7.1.3 Flicker noise
7.2 Noise modeling using the impedance field method
7.2.1 Thermal noise in MOSFETs
7.2.2 Flicker noise in MOSFETs
7.2.2.1Measurement results
7.3 Consistency of noise models
7.4 Design-oriented noise models
7.4.2 Flicker noise in terms of inversion levels
7.4.3 The corner frequency
7.5 Small-dimension effects on MOSFET noise
7.5.2 The impedance field for short channel MOSFETs
7.5.3 Drain current noise of short channel MOSFETs
8.1 Introduction
8.2 Non quasi-static operation of the MOSFET
8.3 Non quasi-static small-signal model
8.4 The y-parameter model
8.5 Channel segmentation
8.6 Induced gate noise
9.1 Gate tunneling current
9.1.1 Tunneling through a potential barrier [2]
9.1.2 Compact model for tunneling in MOS structures
9.1.2.2 Equations for the tunneling current
9.1.2.3 Comparison between models [14]
9.2 Bulk current
9.2.1 Gate-induced drain leakage
9.2.2 Impact ionization current
9.2.2.1 Weak avalanche
9.2.2.2 Breakdown
10.1 Introduction
10.2 Deep submicron planar MOS transistor structures
10.3 Silicon-on-insulator (SOI) CMOS transistors
10.3.1 Pinch-off voltage calculation 2
10.4 Undoped surrounding-gate transistors
Section 10.5 Multiple-gate transistors
10.5 Multiple-gate transistors
11.1 Introduction
11.2 Threshold voltage and short-channel effects
11.4 Slope factor and subthreshold slope
11.5 Mobility degradation with transversal field
12.1 Surface potential- vs. inversion charge-based models
12.2 Charge-based models
12.2.1 The ACM model
12.2.2 The EKV model
12.2.3 The BSIM5 model
12.3 Surface potential models
12.3.1 The HiSIM model
12.3.2 MOS model 11
12.3.3 The SP model
E.1 Electrostatics in equilibrium
E.3 Quasi-Fermi potentials in the pn junction
Index
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Mosfet Modeling for Circuit Analysis and Design

Mosfet Modeling for Circuit Analysis and Design

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Published by: jagadish_05ec752258 on Aug 26, 2010
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12/03/2012

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