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Published by: dassony on Sep 23, 2010
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ADC and DAC devices
1-Analogue-to-Digital Conversion
1.1 Basic concepts
ADC is the conversion of Analogue signals into binary signals.
ADC involves sampling, quantisation and coding.
Sampling is the discretisation of signals in the time domain. Samples are takenat regular intervals.
Sampling frequency
is the rate at which samples aretaken, it is expressed in Hz. For example a sampling frequency of 10 kHzmeans 10,000 samples are taken every second.
Quantisation involves discretisation of the signal in the “voltage domain”, theaim is to have a finite number of levels to enable coding with binary. Number of levels is often expressed as the number of bits needed to represent them.For example 256 levels is equivalent to “8 bit”.
Coding is the representation of each quantisation level with a unique binarycode.
ADC often result in loss (or error) of information from the original signal. Themain errors are sampling (aliasing) and quantisation errors. These are naturalresult from the discretisation of continuous signals.
 Nyquist rate is the sampling frequency at which the sampling error can beavoided. Nyquist rate is defined as double the highest frequency component(harmonic) in the signal. Frequency components can be obtained via Fourier analysis of the signal. E.g. audio signals range between 20-20,000HZ, theoptimal sampling frequency should be double the maximum frequencycomponent, i.e. 2x 20kHz, therefore 40,000Hz or 40kHz.
Examples of applications include ADCs and DACs used in most computer sound cards, mobile phones and embedded systems of all types. 
ADCs are often specified by voltage range, bit and/or voltage resolution.Voltage range refers to the difference between the minimum and maximum analogueinput values of the ADC.
Bit resolution is the number of bits used for the digital output and depends on thenumber of quantisation levels. E.g. In simple binary coding ADC 4 bit will beSamplingQuantisationCodingAnalogueDigital
used for 16 levels, 5 for 32 etc. as a general rule number of level = 2
, n being the bit resolution.
Voltage resolution results from voltage range and n. It is the voltage incrementthat corresponds to digital output increment of “1”. Voltage variations smaller than the voltage resolution cannot be accurately measured/converted. It alsodetermines the largest quantisation error possible.
Voltage resolution = Voltage range/number of levels
1.1 Examples of ADC circuits
This is a sample of the large number of analogue-to-digital conversion methods. The basic principle of operation is to use the comparator principle to determine whether or not to turn on a particular bit of the binary number output. It is typical for an ADC touse a digital-to-analogue converter (DAC) to determine one of the inputs to thecomparator.
A-Digital Ramp ADC
Conversion from analogue to digital form inherently involves comparator actionwhere the value of the analogue voltage at some point in time is compared with somestandard. A common way to do that is to apply the analogue voltage to one terminalof a comparator and trigger a binary counter which drives a DAC. The output of theDAC is applied to the other terminal of the comparator. Since the output of the DACis increasing with the counter, it will trigger the comparator at some point when itsvoltage exceeds the analogue input. The transition of the comparator stops the binarycounter, which at that point holds the digital value corresponding to the analoguevoltage.
B- Successive Approximation ADC
Illustration of 4-bit SAC with 1 volt step size (after Tocci, Digital Systems).The successive approximation ADCis much faster than the digital rampADC because it uses digital logic toconverge on the value closest to theinput voltage. A comparator and aDAC are used in the process.Typically the conversion takes (n)steps where as for digital ramp it cantake up to 2
steps. n being the bitresolution.Illustrated is a 3-bit flash ADC with resolution 1 volt .The resistor net and comparators provide an input to thecombinational logic circuit, so the conversion time is just the propagation delay through the network - it is notlimited by the clock rate or some convergence sequence.It is the fastest type of ADC available, but requires acomparator for each value of output (63 for 6-bit, 255for 8-bit, etc.) Such ADCs are available in IC form up to8-bit and 10-bit flash ADCs (1023 comparators) are planned. The encoder logic executes a truth table toconvert the ladder of inputs to the binary number output.This ADC takes technically 1 step for conversion. Itsspeed is only limited by propagation delays which areinherent to any logic circuit. Therefore, this design isfaster than the previous counter based ADCs. It is alsomore expensive.

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