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Table Of Contents

1.2.2 SIC/XE Machine Architecture VAX Architecture Pentium Pro Architecture UltraSPARC Architecture Cray T3E Architecture
2. Algorithms and Data structure
3.1 Instruction formats and Addressing Modes
3.2.1 Literals:
3.2.2 Symbol-Defining Statements:
3.2.3 Expressions:
3.2.4 Program Blocks:
3.2.5 Control Sections:
3.3.1 Absolute Loader
3.3.2 A Simple Bootstrap Loader
3.4 Machine-Dependent Loader Features
3.5 Program Linking
3.6.1 Program Logic for Pass 1
3.6.2 Program Logic for Pass 2
3.6.3 Improve Efficiency, How?
3.7.1 Automatic Library Search
3.7.2 Loader Options
3.8.1 Linking Loaders
3.8.2 Linkage Editors
3.8.3 Dynamic Linking
3.8.4 Bootstrap Loaders
3.9.1 MS-DOS Linker
3.9.2 SunOS Linkers
3.9.3 Cray MPP Linker
4.1.2 Macro Processor Algorithm and Data Structure:
4.1.3Comparison of Macro Processor Design
4.2.1 Concatenation of unique labels:
4.2.2Generation of Unique Labels
4.2.3 Conditional Macro Expansion
4.2.4Keyword Macro Parameters
4.3.1 Recursive Macro Expansion
4.3.2 General-Purpose Macro Processors
4.3.3Macro Processing within Language Translators
4.3.4Line-by-Line Macro Processor
4.3.5Integrated Macro Processor
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Published by: Kailash Piramanayagam on Oct 17, 2010
Copyright:Attribution Non-commercial


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