Log In | Sign Up | Help
Upload_transparent

Indexing

Your document has been indexed by the following search engines:

Google Bot has been here 101 times.
  • First crawled 12 months ago.
  • Last crawled 2 days ago.
Yahoo! Bot has been here 295 times.
  • First crawled 9 months ago.
  • Last crawled 1 day ago.
MSN Bot has been here 14 times.
  • First crawled 5 months ago.
  • Last crawled 4 days ago.

Latest Searches Leading to this Doc

144-bit cam
cam search line
low power content addresable memory
low power content addressable memory
content addressable memory tutorial pagiamtzis
content addressable memory.pdf
low power memory vlsi
clocked sense amplifier cam
a low power content addressable memory using pipelined hierarchical search scheme
"low swing voltage"+"flip flops"+2008
content addressable memory cam
advantages of adressable memory low power design in vlsi
nand based cam
content addressable memories circuit designing
how does cam memory work -camera
digital content addressable memory design
hierarchical memory netlist
tcam power
hierarchical cell block+content addressable memory+pdf
low power using pipeline and parallelism
memorycam
cam power dissipation
what is the clock cycle of cam
“a low-power content-addressable memory (cam) using
content addressable memory
kart exhaust header design
using signals for pipelining
content addressable memory schematic
router power dissipation cam
cam?memory?content?download
content addressable memory design
power tcam
design content-addressable memory circuits and architectures using c language
pipelining for low power
content addressable memory hp
cam memory design
ali sheikholeslami
ternary content addressable memory fabrication
design of content addressable memory in hardware
"activity factor of" power
nanosim reference guide
ternary cam
low-power memory techniques
a low-power content-addressable memory (cam) using pipelined hierarchical search scheme
power reduction "content addressable memory"
paper on low power cam design
low power memory for vlsi
low power memory design in vlsi circuits
ternary content addressable memories
pagiamtzis
paper of low power memory
content addressable memory differential sense -patent
escalation "electric utilities" purchasing or procurement transformers
"search line" swing
ipv6 content addressable memory
cam memory transistor
technology using content addressable memory
dr. f. sheikholeslami
These queries are updated daily.

A low-power content-addressable memory (CAM) using pipelined hierarchical search scheme

This paper presents two techniques to reduce power consumption in content-addressable memories (CAMs). The first technique is to pipeline the search operation by breaking the match-lines into several segments. Since most stored words fail to match in their first segments, the search operation is discontinued for subsequent segments, hence reducing power. The second technique is to broadcast small-swing search data on less capacitive global search-lines, and only amplify this signal to full swing on a shorter local search-line. As few match-line segments are active, few local search-lines will be enabled, again saving power. We have employed the proposed schemes in a 1024 144-bit ternary CAM in 1.8-V 0.18-μm CMOS, illustrating an overall power reduction of 60% compared to a nonpipelined, nonhierarchical architecture. The ternary CAM achieves a 7-ns search cycle time at 2.89 fJ/bit/search.

  • Send This
  • Add_to_favs_transparent
  • Embed
  • Download
  • Flag
  • Add to Favorites

Scribd requires Javascript. Please enable Javascript in your browser.

Document Information

551 Views | 1 Like | 0 Comments | 1 Favorite

Added By
Description

This paper presents two techniques to reduce power consumption in content-addressable memories (CAMs). The first technique is to pipeline the search operation by breaking the match-lines into several segments. Since most stored words fail to match in their first segments, the search operation is discontinued for subsequent segments, hence reducing power. The second technique is to broadcast small-swing search data on less capacitive global search-lines, and only amplify this signal to full swing on a shorter local search-line. As few match-line segments are active, few local search-lines will be enabled, again saving power. We have employed the proposed schemes in a 1024 144-bit ternary CAM in 1.8-V 0.18-μm CMOS, illustrating an overall power reduction of 60% compared to a nonpipelined, nonhierarchical architecture. The ternary CAM achieves a 7-ns search cycle time at 2.89 fJ/bit/search.

Pdf_16x16 8 Pages


Date Added

12 months

ago
Category

Uncategorized.

Tags
Groups
Type

No Document Type.

Copyright

Attribution Non-commercial

More info »