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JNTU Question papers 2008

JNTU Question papers 2008

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Code No: RR410408
Set No. 1
IV B.Tech I Semester Supplimentary Examinations, February 2008

ADVANCED COMPUTER ARCHITECTURE
( Common to Electronics & Communication Engineering and Electronics &
Computer Engineering)

Time: 3 hours
Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
\u22c6 \u22c6 \u22c6 \u22c6 \u22c6
1. What is meant by parallelism in uniprocessor systems? Identify the various mech-
anisms that have been developed for this purpose and describe them.
[16]
2. (a) What is the utility of a reservation table? Taking a suitable unifunction
pipeline as an example, draw the reservation table and its state diagram.
(b) What are recon\ufb01gurable pipelines? Explain the bene\ufb01t of these pipelines with
the help of a suitable example.
[8+8]
3. (a) Discuss the issues involved for Inter\u2212 PE Communication in array processors.
(b) What is a Multistage Network? Describe di\ufb00erent types of multistage network.
[8+8]
4. (a) Describe Merge - Sorting in M(4,4) sorting algorithm using an example.

(b) Explain the advantages of using shu\ufb04e interconnection for the implementation of the polynomial evaluation algorithm, as compared with the use of the Illiac mesh network for the same purpose.

[8+8]
5. (a) With a diagram explain the construction of 42X32 Delta network.
(b) Compare and contrast the performance of interconnection networks. [10+6]
6. (a) List the major characteristics, advantages and shortcomings of three types of
multiprocessor operating systems.
(b) List the four main sources of performance degradation of the dynamic coher-
ence check algorithm.
[12+4]
7. (a) Describe data \ufb02ow design alternatives.
(b) Explain the organization of the EDDY data \ufb02ow machine.
[8+8]
8. Write short notes on
(a) Vector instruction in cyber-205.
(b) Input output subsystem con\ufb01guration of cyber-205.
[8+8]
\u22c6 \u22c6 \u22c6 \u22c6 \u22c6
1 of 1
Code No: RR410408
Set No. 2
IV B.Tech I Semester Supplimentary Examinations, February 2008

ADVANCED COMPUTER ARCHITECTURE
( Common to Electronics & Communication Engineering and Electronics &
Computer Engineering)

Time: 3 hours
Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
\u22c6 \u22c6 \u22c6 \u22c6 \u22c6
1. Explain di\ufb00erent parallel processing mechanisms that are possible in uniprocessor
computers.
[16]
2. (a) What are pipeline hazards? What are the causes of pipeline hazards? Describe
brie\ufb02y the hazard detection and resolution of hazards in pipelines.
(b) What are the various classes of data-dependant hazards? Describe the hazards
and their removal.
[8+8]

3. Design a data routing Network for an SIMD Array processor with 256P E\u2032 s. Draw an interconnection Barrel shifting network showing all directly wired connections among the 256PE\u2032 s and calculate the minimum number of routing steps from any

PEIto any otherPEI+kfor the arbitrary distance 1\u2264 k\u2264255 .
[16]
4. (a) Describe any two associative searching algorithms.
(b) Explain the architecture of STARAN associative processor.
[8+8]
5. (a) Give the computer module of a nonhierarchical loosely coupled multiprocessor
system.
(b) Give the various components of the Kmap in Cm*, architecture and explain
the message transfer mechanism between modules.
[10+6]
6. (a) Explain software requirements for multiprocessors.
(b) What is cache coherence? Describe method to avoid this problem.
[8+8]
7. (a) Describe the properties of data \ufb02ow languages.
(b) Draw a data \ufb02ow graph to represent z = N!.
[8+8]
8. (a) Discuss about a simple queuing structure with a single processor having inter
arrival time and service times.
(b) Discuss in detail the performance of M/M/n queuing structure.
[8+8]
\u22c6 \u22c6 \u22c6 \u22c6 \u22c6
1 of 1
Code No: RR410408
Set No. 3
IV B.Tech I Semester Supplimentary Examinations, February 2008

ADVANCED COMPUTER ARCHITECTURE
( Common to Electronics & Communication Engineering and Electronics &
Computer Engineering)

Time: 3 hours
Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
\u22c6 \u22c6 \u22c6 \u22c6 \u22c6
1. (a) Compare and contrast RAM, SAM and DASD.
(b) Explain di\ufb00erent addressing schemes for main memory.
[8+8]
2. (a) With the help of neat block diagram explain the concept of Linear pipe line,
and how it di\ufb00ers with non linear pipe line.
(b) Design a Linear pipe line for a Floating Point Adder.
[8+8]
3. (a) With an example illustrate the mechanism of data routing in an array proces-
sor.
(b) List down some applications of an array processor.
[10+6]
4. (a) Describe various associative search operations.
(b) Describe data routing, comparison and interchange operations performed in
the M(4,2) sorting algorithm with an example.
[8+8]
5. (a) Di\ufb00erentiate between bu\ufb00ered and unbu\ufb00ered 2x2 switches. Give their appli-
cations.
(b) Describe a multiport memory without \ufb01xed priority assignment.
[8+8]
6. (a) What are the two resource allocation decisions that are made in multiprocess-
ing systems?
(b) Explain brie\ufb02y the two basic kinds of processor scheduling in multiprocessors.
(c) With the help of a diagram, explain states of a process and their state transi-
tions.
[4+4+8]
7. (a) Describe the instruction execution process in a data \ufb02ow computer for com-
putation of a = (b+1)*(b-c) .
(b) Describe VLSI matrix multiplication.
[8+8]
8. (a) What are the fundamental classes of performance measures? Explain in detail
(b) Discuss in detail the performance of M/M/1 queuing structure.
[8+8]
\u22c6 \u22c6 \u22c6 \u22c6 \u22c6
1 of 1

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