of processors together with the advancement inmulti-processor technologies.In this decade, computer architecture has entereda new ‘multi-core’ era with the advent of ChipMulti-processors (CMP). Many leadingcompanies, Intel, AMD and IBM, havesuccessfully released their multi-core processor series, such as Intel IXP network processors, the Cell processor , the AMDOpteronTM
etc. CMPs have evolved largely dueto the increased power consumption in nanoscaletechnologies which have forced the designers toseek alternative measures instead of devicescaling to improve performance. Increasing parallelism with multiple cores is an effectivestrategy .
III. EVOLUTION OF PROCESSOR ARCHITECTURE
Dual and multi-core processor systems are goingto change the dynamics of the market and enablenew innovative designs delivering high performance with an optimized power characteristic. They drive multithreading and parallelism at a higher than instruction level, and provide it to mainstream computing on a massivescale. From an operating system level (OS), theylook like a symmetric multi-processor system(SMP) but they bring lot more advantage thantypical dual or multi- processor systems.Multi-core processing is a long-term strategy for Intel that began more than a decade ago. Intelhas more than 15 multi- core processor projectsunderway and it is on the fast track to deliver multi-core processors in high volume across off of their platform families. Intel’s multi-corearchitecture will possibly feature dozens or evenhundreds of processor cores on a single die. Inaddition to general-purpose cores, Intel multi-core processors will eventually includespecialized cores for processing graphics, speechrecognition algorithms, communication protocols, and more. Many new and significantinnovations designed to optimize the power, performance, and scalability is implemented intothe new multi-core processors .According to the number of functional unitsrunning simultaneously, the processor architecture is classified into 3 main typesnamely:
Single processor architecture, whichdoes not support multiple functionalunits to run simultaneously.
Simultaneous multithreading (SMT)architecture, which supports multiplethreads to run simultaneously but notthe multiple functional units at any particular time.
Multi-core architecture or Chip multi- processor (CMP) architecture, whichsupports functional units to runsimultaneous and may support multiplethreads also simultaneously at any particular time.
A. Single processor architecture
The single processor architecture is shown infigure 1. Here only one processing unit is presentin the chip for performing the arithmetic or logical operations. At any particular time, onlyone operation can be performed.
Single core CPU chip
B. Simultaneous multithreading (SMT)architecture
SMT permits simultaneous multiple independentthreads to execute simultaneously on the samecore. If one thread is waiting for a floating pointoperation to complete, another thread can useinteger units. Without SMT, only a single threadcan run at any given time. But in SMT, the samefunctional unit cannot be executedsimultaneously. If two threads want to executethe integer unit at the same time, it is not possible with SMT. Here all the caches of thesystem are shared.
. Chip Multi-Processor architecture
(IJCSIS) International Journal of Computer Science and Information Security,Vol. 8, No. 7, October 2010112http://sites.google.com/site/ijcsis/ISSN 1947-5500