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MSP430G2231 - Datasheet

MSP430G2231 - Datasheet

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Published by: mbenhebi on Nov 30, 2010
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M SP430G2x31M SP430G2x21
www.ti.com
SLAS694C –FEBRUARY 2010–REVISED JULY 2010
M IXED SIGNAL M ICRO CO NTRO LLER
1
FEATURES
Low Supply-Voltage Range: 1.8 V to 3.6 V 16-Bit Timer_A With Two Capture/CompareRegistersUltralow Power ConsumptionUniversal Serial Interface (USI) Supporting SPI – Active Mode: 220 µA at 1 MHz, 2.2 Vand I2C (SeeTable 1) – Standby Mode: 0.5 µABrownout Detector – Off Mode (RAM Retention): 0.1 µA10-Bit 200-ksps A/D Converter With InternalFive Power-Saving ModesReference, Sample-and-Hold, and AutoscanUltrafast Wake-Up From Standby Mode in Less(SeeTable 1)Than 1 µsSerial Onboard Programming,16-Bit RISC Architecture, 62.5-ns InstructionNo External Programming Voltage Needed,Cycle TimeProgrammable Code Protection by SecurityBasic Clock Module ConfigurationsFuse – Internal Frequencies up to 16 MHz WithOn-Chip Emulation Logic With Spy-Bi-WireOne Calibrated FrequencyInterface – Internal Very Low Power Low-FrequencyFamily Members Details SeeTable 1(LF) OscillatorAvailable in 14-Pin Plastic Small-Outline Thin – 32-kHz CrystalPackage (TSSOP), 14-Pin Plastic Dual Inline – External Digital Clock Source Package (PDIP), and 16-Pin QFNFor Complete Module Descriptions, See the
MSP430x2xx Family User’s Guide 
DESCRIPTION
The Texas Instruments MSP430 family of ultralow-power microcontrollers consists of several devices featuringdifferent sets of peripherals targeted for various applications. The architecture, combined with five low-powermodes, is optimized to achieve extended battery life in portable measurement applications. The device features apowerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to maximum code efficiency.The digitally controlled oscillator (DCO) allows wake-up from low-power modes to active mode in less than 1 µs.The MSP430G2x21/31 series is an ultralow-power mixed signal microcontroller with a built-in 16-bit timer and tenI/O pins. The MSP430G2x31 family members have a 10-bit A/D converter and built-in communication capabilityusing synchronous protocols (SPI or I2C). For configuration details, seeTable 1.Typical applications include low-cost sensor systems that capture analog signals, convert them to digital values,and then process the data for display or for transmission to a host system.
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2010, Texas Instruments Incorporated
Products conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
 
M SP430G2x31M SP430G2x21
SLAS694C –FEBRUARY 2010–REVISED JULY 2010
www.ti.com
Table 1. Available Options
(1)
Flash RAM ADC10 PackageDevice BSL EEM Timer_A USI Clock I/O(KB) (B) Channel Type
(2)
MSP430G2231IRSA16 16-QFNMSP430G2231IPW14 - 1 2 128 1x TA2 1 8 LF, DCO, VLO 10 14-TSSOPMSP430G2231IN14 14-PDIPMSP430G2221IRSA16 16-QFNMSP430G2221IPW14 - 1 2 128 1x TA2 1 - LF, DCO, VLO 10 14-TSSOPMSP430G2221IN14 14-PDIPMSP430G2131IRSA16 16-QFNMSP430G2131IPW14 - 1 1 128 1x TA2 1 8 LF, DCO, VLO 10 14-TSSOPMSP430G2131IN14 14-PDIPMSP430G2121IRSA16 16-QFNMSP430G2121IPW14 - 1 1 128 1x TA2 1 - LF, DCO, VLO 10 14-TSSOPMSP430G2121IN14 14-PDIP(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TIweb site atwww.ti.com.(2) Package drawings, thermal data, and symbolization are available atwww.ti.com/packaging.2
Copyright © 2010, Texas Instruments Incorporated
 
1
DVCC
2345678
P1.6/TA0.1/SDO/SCL/TDI/TCLK
9
P1.7/SDI/SDA/TDO/TDI
10
RST/NMI/SBWTDIO
11
TEST/SBWTCK
12
XOUT/P2.7
13
XIN/P2.6/TA0.1
14
DVSSP1.0/TA0CLK/ACLKP1.1/TA0.0P1.2/TA0.1P1.3P1.4/SMCLK/TCKP1.5/TA0.0/SCLK/TMS
N OR PW PACKAGE(TOPVIEW)
12345
     P     1 .     4     /      S      M     C      L     K     /      T     C      K
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     P     1 .     5      /      T     A     0  .     0      /      S      C      L     K     /      T     M     S 
7
     P     1 .     6      /      T     A     0  .     1     /      S      D     O      /      S      C      L     /      T     D     I     /      T     C      L     K
8
     P     1 .     7     /      S      D     I     /      S      D     A     /      T     D     O      /      T     D     I
910111213
     D     V     S      S 
14
     D     V     S      S 
15
     D     V     C      C 
16
     D     V     C      C 
P1.0/TA0CLK/ACLKP1.1/TA0.0P1.2/TA0.1P1.3
RSAPACKAGE(TOPVIEW)
XIN/P2.6/TA0.1XOUT/P2.7TEST/SBWTCKRST/NMI/SBWTDIO
M SP430G2x31M SP430G2x21
www.ti.com
SLAS694C –FEBRUARY 2010–REVISED JULY 2010
Device Pinout, MSP430G2x21
NOTE: See port schematics inApplication Informationfor detailed I/O information.NOTE: See port schematics inApplication Informationfor detailed I/O information.
Copyright © 2010, Texas Instruments Incorporated
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