Welcome to Scribd. Sign in or start your free trial to enjoy unlimited e-books, audiobooks & documents.Find out more
Download
Standard view
Full view
of .
Look up keyword or section
Like this
3Activity

Table Of Contents

0 of .
Results for:
No results containing your search query
P. 1
m05BIST0504

m05BIST0504

Ratings:
(0)
|Views: 80|Likes:
Published by Darshan Harish

More info:

Published by: Darshan Harish on Dec 01, 2010
Copyright:Attribution Non-commercial

Availability:

Read on Scribd mobile: iPhone, iPad and Android.
download as PDF, TXT or read online from Scribd
See more
See less

09/20/2012

pdf

text

original

 
Memory BuiltMemory Built--In SelfIn Self--TestTest
Cheng-Wen Wu
吳誠文
Lab for Reliable ComputingDept. Electrical EngineeringNational Tsing Hua University
 
OutlineOutline
Introduction
ROM BIST
RAM BIST approaches
RAM BIST architectures
Typical MBIST architectures
March-programmable MBIST
Processor-programmable MBIST
BRAINS: a RAM BIST compiler
Conclusions
 m05bist5.04Cheng-Wen Wu, NTHU2
 
Memory Cores on SOCMemory Cores on SOC
Embedded memories are among the mostcommon cores in SOC
How to test embedded memories?
CPU
 
CPUDSP
 
DSPSRAM
 
SRAMBus/IO
 
Bus/IOFlash
 
FlashROM
 
ROMDRAM
 
DRAM
 m05bist5.04Cheng-Wen Wu, NTHU3

You're Reading a Free Preview

Download
scribd
/*********** DO NOT ALTER ANYTHING BELOW THIS LINE ! ************/ var s_code=s.t();if(s_code)document.write(s_code)//-->