Professional Documents
Culture Documents
1. Abbreviations
2. Figures locations
3. Introduction
4. Block Diagram
4.1Block Diagram Description
5. Schematic
5.1Schematic Description
6. Hardware Components
6.1 Power supply
6.2 Microcontroller
6.3 LCD
6.4 relay
7. Software components
8. Source code
9. Conclusion
10. Future Aspects
11. Bibliography
1. ABBREVIATIONS
Symbol Name
ACC Accumulator
B B register
SP Stack pointer
P0 Port0
P1 Port1
P2 Port2
P3 Port3
AC Alternating Current
2.FIGURE LOCATIONS
1 Block diagram
2 Schematic Diagram
3 Power Supply
6 Smoothing Capacitors
8 Architecture of 8052
9 Oscillator connections
10 TCON Register
11 TMOD Register
18 Pin specifications
26 4*4 keypad
ABSTRACT
Advanced Security System using mobiles
Aim:
The main aim of the project is to provide security to any system using DTMF technology.
DTMF
Description: DTMF: DTMF stands for Dual-Tone-Multi-
Frequency. DTMF is used for
Here I’m going to controlling two telecommunication signaling over analog
telephone lines in the voice frequency band
devices (Fan and Bulb) using 8051uC
between telephone handsets and other
kit, Relays, DTMF and two mobile communication devices and the switching
phones. The uC kit is connected to Fan center.
and Bulb through relays.And the relays DTMF is used for tone dialing using
push buttons
are controlled by uC. The control signals
whenever we press push buttons on
are send to uC using mobile phone telephone handsets two pre assigned
through DTMF circuit. frequencies will transmit and we can
assign some functionality to that key or
group of keys by which can control
My first mobile connected to my kit remote devices using DTMF.
and second mobile is used to send
password to mobile phone1.Pre defined
password is set to fan and bulb whenever the password matches the on/off switches are operated.
CHAPTER-1
EMBEDDED SYSTEMS
Introduction:
System
Software Hardware
ALP Processor
C Peripherals
VB memory
Etc.,
Software deals with the languages like ALP, C, and VB etc., and Hardware deals with
Processors, Peripherals, and Memory.
Transport
Domestic service
Communications
Office systems and mobile equipment
Banking, finance and commercial
Medical diagnostics, monitoring and life support
Testing, monitoring and diagnostic systems
Instruction set: The set of instructions that the microprocessor can execute.
Bandwidth : The number of bits processed in a single instruction.
Clock speed : Given in megahertz (MHz), the clock speed determines how many instructions
per second the processor can execute.
In both cases, the higher the value, the more powerful the CPU. For example, a 32-bit
microprocessor that runs at 50MHz is more powerful than a 16-bit microprocessor that runs at
25MHz. In addition to bandwidth and clock speed, microprocessors are classified as being either
RISC (reduced instruction set computer) or CISC (complex instruction set computer).
A microprocessor has three basic elements, as shown above. The ALU performs all arithmetic
computations, such as addition, subtraction and logic operations (AND, OR, etc). It is controlled
by the Control Unit and receives its data from the Register Array. The Register Array is a set of
registers used for storing data. These registers can be accessed by the ALU very quickly. Some
registers have specific functions - we will deal with these later. The Control Unit controls the
entire process. It provides the timing and a control signal for getting data into and out of the
registers and the ALU and it synchronizes the execution of instructions (we will deal with
instruction execution at a later date).
Three Basic Elements of a Microprocessor
ALU
CU
Memory
There are two different types of computer instruction set there are:
Besides performance improvement, some advantages of RISC and related design improvements
are:
A new microprocessor can be developed and tested more quickly if one of its aims is to be less
complicated.
Operating system and application programmers who use the microprocessor's instructions will
find it easier to develop code with a smaller instruction set.
The simplicity of RISC allows more freedom to choose how to use the space on a
microprocessor.
Higher-level language compilers produce more efficient code than formerly because they have
always tended to use the smaller set of instructions to be found in a RISC computer.
RISC characteristics
CISC, which stands for Complex Instruction Set Computer, is a philosophy for designing chips
that are easy to program and which make efficient use of memory. Each instruction in a CISC
instruction set might perform a series of operations inside the processor. This reduces the number
of instructions required to implement a given program, and allows the programmer to learn a
small but flexible set of instructions.
Microprogramming is as easy as assembly language to implement, and much less expensive than
hardwiring a control unit.
The ease of micro-coding new instructions allowed designers to make CISC machines upwardly
compatible: a new computer could run the same programs as earlier computers because the new
computer would contain a superset of the instructions of the earlier computers.
As each instruction became more capable, fewer instructions could be used to implement a given
task. This made more efficient use of the relatively slow main memory.
Because micro program instruction sets can be written to match the constructs of high-level
languages, the compiler does not have to be as complicated.
The disadvantages of CISC
Still, designers soon realized that the CISC philosophy had its own problems, including:
Earlier generations of a processor family generally were contained as a subset in every new
version --- so instruction set & chip hardware become more complex with each generation of
computers.
So that as many instructions as possible could be stored in memory with the least possible wasted
space, individual instructions could be of almost any length---this means that different
instructions will take different amounts of clock time to execute, slowing down the overall
performance of the machine.
Many specialized instructions aren't used frequently enough to justify their existence ---
approximately 20% of the available instructions are used in a typical program.
CISC instructions typically set the condition codes as a side effect of the instruction. Not only
does setting the condition codes take time, but programmers have to remember to examine the
condition code bits before a subsequent instruction changes them.
Memory Architecture
Harvard Architecture
Von-Neumann Architecture
Harvard Architecture
Computers have separate memory areas for program instructions and data. There are two or more
internal data buses, which allow simultaneous access to both instructions and data. The CPU
fetches program instructions on the program memory bus.
The Harvard architecture is a computer architecture with physically separate storage and signal
pathways for instructions and data. The term originated from the Harvard Mark I relay-based
computer, which stored instructions on punched tape (24 bits wide) and data in electro-
mechanical counters. These early machines had limited data storage, entirely contained within
the central processing unit, and provided no access to the instruction storage as data. Programs
needed to be loaded by an operator, the processor could not boot itself.
Figure: Harvard Architecture
A computer has a single, common memory space in which both program instructions and data
are stored. There is a single internal data bus that fetches both instructions and data. They cannot
be performed at the same time
The von Neumann architecture is a design model for a stored-program digital computer that
uses a central processing unit (CPU) and a single separate storage structure ("memory") to hold
both instructions and data. It is named after the mathematician and early computer scientist John
von Neumann. Such computers implement a universal Turing machine and have a sequential
architecture.
A stored-program digital computer is one that keeps its programmed instructions, as well as its
data, in read-write, random-access memory (RAM). Stored-program computers were
advancement over the program-controlled computers of the 1940s, such as the Colossus and the
ENIAC, which were programmed by setting switches and inserting patch leads to route data and
to control signals between various functional units. In the vast majority of modern computers, the
same memory is used for both data and program instructions. The mechanisms for transferring
the data and instructions between the CPU and memory are, however, considerably more
complex than the original von Neumann architecture.
The terms "von Neumann architecture" and "stored-program computer" are generally used
interchangeably, and that usage is followed in this article.
The primary difference between Harvard architecture and the Von Neumann architecture is in
the Von Neumann architecture data and programs are stored in the same memory and managed
by the same information handling system.
Whereas the Harvard architecture stores data and programs in separate memory devices and they
are handled by different subsystems.
In a computer using the Von-Neumann architecture without cache; the central processing unit
(CPU) can either be reading and instruction or writing/reading data to/from the memory. Both of
these operations cannot occur simultaneously as the data and instructions use the same system
bus.
In a computer using the Harvard architecture the CPU can both read an instruction and access
data memory at the same time without cache. This means that a computer with Harvard
architecture can potentially be faster for a given circuit complexity because data access and
instruction fetches do not contend for use of a single memory pathway.
Today, the vast majority of computers are designed and built using the Von Neumann
architecture template primarily because of the dynamic capabilities and efficiencies gained in
designing, implementing, operating one memory system as opposed to two. Von Neumann
architecture may be somewhat slower than the contrasting Harvard Architecture for certain
specific tasks, but it is much more flexible and allows for many concepts unavailable to Harvard
architecture such as self programming, word processing and so on.
Harvard architectures are typically only used in either specialized systems or for very specific
uses. It is used in specialized digital signal processing (DSP), typically for video and audio
processing products. It is also used in many small microcontrollers used in electronics
applications such as Advanced RISK Machine (ARM) based products for many vendors.
CHAPTER-2
OVERVIEW OF PROJECT
The application is not only restricted to remote operation, it operate directly also,
like we are at home then we will give commands directly through the keypad to the
microcontroller kit for switching the devices at home with a security code. .
Block Diagram
Power Supply:
Hardware Implementation:
POWER SUPPLY:
A device or system that supplies electrical or other types of energy to an output load or group of
loads is called a power supply unit or PSU. The term is most commonly applied to electrical
energy supplies, less often to mechanical ones, and rarely to others. Power supply generates the
required voltage by using the transformer, bridge rectifier, filter and voltage regulator. Here we
giving 5v to the micro controller.
MICROCONTROLLER:
The microcontroller is the heart of the proposed embedded system. The controller used is a low
power, cost efficient chip manufactured by ATMEL having 8K bytes of on-chip flash memory.
Keil uVision
Embedded C
Express PCB
KEIL Software
On most computers, the CD will “auto run”, and you will see the Keil installation menu. If the
menu does not appear, manually double click on the Setup icon, in the root directory: you will
then see the Keil menu.
On the Keil menu, please select “Install Evaluation Software”. (You will not require a license
number to install this software).
Go to Project – Open Project and browse for Hello in Ch03_00 in Pont and open it.
Go to Project – Select Device for Target ‘Target1’
Select 8052(all variants) and click OK
Having successfully built the target, we are now ready to start the debug session and run the
simulator.
Go to Debug - Go
While the simulation is running, view the performance analyzer to check the delay durations.
Go to Debug – Performance Analyzer and click on it
Double click on DELAY_LOOP_Wait in Function Symbols: and click Define button
CHAPTER-3
MICROCONTROLLER
Microcontroller
Features:
• 3 16-bit Timer/Counters
• Watchdog Timer
• Power-off Flag
Architecture of 8052:
VCC:
Supply voltage.
GND:
Ground
Port 0:
Port 0 is an 8-bit open drain bi-directional I/O port. As an output port, each pin can sink
eight TTL inputs. When 1’s are written to port 0 pins, the pins can be used as high impedance
inputs. Port 0 can also be configured to be the multiplexed low order address/data bus during
accesses to external program and data memory. In this mode, P0 has internal pull-ups.Port 0 also
receives the code bytes during Flash Programming and outputs the code bytes during program
verification. External pull-ups are required during program verification
Port 1:
Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 1 Output buffers can
sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the
internal pull-ups and can be used as inputs. In
addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external count input(P1.0/T2)
and the timer/counter 2 trigger input P1.1/T2EX), respectively, as shown in the following table.
Port 1 also receives the low-order address bytes during Flash programming and verification.
Port 2:
Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 2 output buffers can
sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the
internal pull-ups and can be used as inputs. Port 2 emits the high-order address byte during
fetches from external program memory and during accesses to external data memory that use 16-
bit addresses (MOVX @DPTR). In this application, Port 2 uses strong internal pull-ups when
emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI),
Port 2emits the contents of the P2 Special
Function Register. Port 2 also receives the high-order address bits and some control signals
during Flash programming and verification
Port 3:
Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 3 output buffers can
sink/source four TTL inputs. When 1s are writ 1s are written to Port 3 pins, they are pulled high
by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being
pulled low will source current (IIL) because of the pull-ups. Port 3 also serves the functions of
various special features of the AT89S52, as shown in the following table.
Port 3 also receives some control signals for Flash programming and verification.
RST:
Reset input. A high on this pin for two machine cycles while the oscillator is running resets
the device.
ALE/PROG:
Address Latch Enable (ALE) is an output pulse for latching the low byte of the address
during accesses to external memory. This pin is also the program pulse input (PROG) during
Flash programming. In normal operation, ALE is emitted at a constant rate of1/6 the oscillator
frequency and may be used for external timing or clocking purposes. Note, however, that one
ALE pulse is skipped during each access to external data Memory. If desired, ALE operation can
be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a
MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable
bit has no effect if the micro controller is in external execution mode.
PSEN:
Program Store Enable (PSEN) is the read strobe to external program memory. When the
AT89S52 is executing code from external program memory, PSEN is activated twice each
machine cycle, except that two PSEN activations are skipped during each access to external data
memory.
EA/VPP:
External Access Enable. EA must be strapped to GND in order to enable the device to
fetch code from external program memory locations starting at 0000H up to FFFFH.Note,
however, that if lock bit 1 is programmed, EA will be internally latched on reset. A should be
strapped to VCC for internal program executions. This pin also receives the 12-voltProgramming
enables voltage (VPP) during Flash programming.
XTAL1:
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
XTAL2:
XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier that can be
configured for use as an on-chip oscillator, as shown in Figure 1. Either a quartz crystal or
ceramic resonator may be used. To drive the device from an External clock source, XTAL2
should be left unconnected while XTAL1 is driven, as shown in Figure
2.
Special Function Registers (SFR s) are areas of memory that control specific
functionality of the 8051 processor. For example, four SFRs permit access to the 8051’s 32
input/output lines. Another SFR allows the user to set the serial baud rate, control and access
timers, and configure the 8051’s interrupt system.
The Accumulator: The Accumulator, as its name suggests is used as a general register to
accumulate the results of a large number of instructions. It can hold 8-bit (1-byte) value and is
the most versatile register.
The “R” registers: The “R” registers are a set of eight registers that are named R0, R1. Etc up to
R7. These registers are used as auxiliary registers in many operations.
The “B” registers: The “B” register is very similar to the accumulator in the sense that it may
hold an 8-bit (1-byte) value. Two only uses the “B” register 8051 instructions: MUL AB and
DIV AB.
The Data Pointer: The Data pointer (DPTR) is the 8051’s only user accessible 16-bit (2Bytes)
register. The accumulator, “R” registers are all 1-Byte values. DPTR, as the name suggests, is
used to point to data. It is used by a number of commands, which allow the 8051 to access
external memory.
The program counter (PC) is a 2-byte address, which tells the 8051 where the next
instruction to execute is found in memory. The stack pointer like all registers except DPTR and
PC may hold an 8-bit (1-Byte) value
ADDRESSING MODES:
An “addressing mode” refers that you are addressing a given memory location. In
summary, the addressing modes are as follows, with an example of each:
Indexed Addressing
Immediate Addressing:
MOV A, #20H:
This instruction uses immediate Addressing because the accumulator will be loaded
with the value that immediately follows in this case 20(hexadecimal). Immediate addressing is
very fast since the value to be loaded is included in the instruction. However, since the value to
be loaded is fixed at compile-time it is not very flexible.
Direct Addressing:
For example:
MOV A, 30h
This instruction will read the data out of internal RAM address 30(hexadecimal) and store
it in the Accumulator. Direct addressing is generally fast since, although the value to be loaded
isn’t included in the instruction, it is quickly accessible since it is stored in the 8051’s internal
RAM. It is also much more flexible than Immediate Addressing since the value to be loaded is
whatever is found at the given address which may variable.
Also it is important to note that when using direct addressing any instruction that refers
to an address between 00h and 7Fh is referring to the SFR control registers that control the 8051
micro controller itself.
Indirect Addressing:
Indirect addressing is a very powerful addressing mode, which in many cases provides
an exceptional level of flexibility. Indirect addressing is also the only way to access the extra 128
bytes of internal RAM found on the 8052. Indirect addressing appears as follows:
MOV A, @R0:
This instruction causes the 8051 to analyze Special Function Register (SFR)
Memory.
Special Function Registers (SFRs) are areas of memory that control specific functionality of
the 8051 processor. For example, four SFRs permit access to the 8051’s 32 input/output lines.
Another SFR allows the user to set the serial baud rate, control and access timers, and configure
the 8051’s interrupt system.
Timer 2 Registers:
Control and status bits are contained in registers T2CON and T2MOD for Timer 2.
The register pair (RCAP2H , RCAP2L) are the Capture / Reload registers for Timer 2 in
16-bit capture mode or 16-bit auto-reload mode .
Interrupt Registers:
The individual interrupt enable bits are in the IE register . Two priorities can be
set for each of the six interrupt sources in the IP register.
Timer 2:
Timer 2:
Timer 2 is a 16-bit Timer / Counter that can operate as either a timer or an event
counter. The type of operation is selected by bit C/T2 in the SFR T2CON. Timer 2 has
three operating Modes : capture , auto-reload ( up or down Counting ) , and baud rate
generator . The modes are selected by bits in T2CON. Timer2 consists of two 8-bit registers,
TH2 and TL2. In the Timer function, the TL2 register is incremented every machine cycle.
Since a machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the
oscillator frequency.
In the Counter function , the register is incremented in response to a 1-to-0
transition at its corresponding external input pin , T2 .When the samples show a high in
one cycle and a low in the next cycle, the count is incremented . Since two machine cycles
(24 Oscillator periods ) are required to recognize 1-to-0 transition , the maximum count
rate is 1 / 24 of the oscillator frequency .
To ensure that a given level is sampled at least once before it changes , the level
should be held for at least one full machine cycle.
Baud Rate Generator:
Timer 2 is selected as the baud rate generator by setting TCLK and/or RCLK
in T2CON . Note that the baud rates for transmit and receive can be different if Timer
2 is used for the receiver or transmitter and Timer 1 is used for the other function .The
baud rates in Modes 1 and 3 are determined by Timer 2’s overflow rate according to the
following equation .
16
The timer operation is different for Timer 2 when it is used as a baud rate generator
.Normally ,as a timer , it increments every machine cycle (at 1/12 the oscillator
frequency).As a baud rate generator , however, it increments every state time ( at 1/2 the
oscillator frequency ) .
Timer 0:
Timer 0 functions as either a timer or event counter in four modes of operation .
Timer 0 is controlled by the four lower bits of the TMOD register and bits 0, 1, 4 and 5
of the TCON register. Mode 0 ( 13-bit Timer) Mode 0 configures timer 0 as a 13-bit
timer which is set up as an 8-bit timer (TH0 register) with a modulo 32 prescaler
implemented with the lower five bits of the TL0 register . The upper three bits of TL0
register are indeterminate and should be ignored. Prescaler overflow increments the
TH0 register. Mode 1 ( 16-bit Timer )Mode 1 is the same as Mode 0, except that the
Timer register is being run with all 16 bits .
Mode 1 configures timer 0 as a 16-bit timer with the TH0 and TL0 registers
connected in cascade. The selected input increments the TL0 register. Mode 2 (8-bit
Timer with Auto-Reload)Mode 2 configures timer 0 as an 8-bit timer ( TL0 register )
that automatically reloads from the TH0 register . TL0 overflow sets TF0 flag in the
TCON register and reloads TL0 with the contents of TH0, which is preset by
software. Mode 3 ( Two 8-bit Timers )Mode 3 configures timer 0 so that registers TL0
and TH0 operate as separate 8-bit timers. This mode is provided for applications requiring
an additional 8-bit timer or counter.
Timer 1:
Baud Rates:
The baud rate in Mode 0 is fixed. The baud rate in Mode 2 depends on the
value of bit SMOD in Special Function Register PCON. If SMOD = 0 (which is its
value on reset), the baud rate is 1/64 the oscillator frequency. If SMOD = 1, the baud
rate is 1/32 the oscillator frequency. In the 89S52, the baud rates in Modes 1 and 3 are
determined by the Timer 1 overflow rate. In case of Timer 2 , these baud rates can
be determined by Timer 1 , or by Timer 2 , or by both (one for transmit and the other for
receive ).
Fig 12: TCON REGISTER: Timer/counter Control Register
Fig 13:TMOD REGISTER: Timer/Counter 0 and 1 Modes
Power Supply:
Power supply is a reference to a source of electrical power. A device or system that supplies
electrical or other types of energy to an output load or group of loads is called a power supply unit or
PSU. The term is most commonly applied to electrical energy supplies, less often to mechanical ones,
and rarely to others.
This power supply section is required to convert AC signal to DC signal and also to reduce the
amplitude of the signal. The available voltage signal from the mains is 230V/50Hz which is an AC
voltage, but the required is DC voltage (no frequency) with the amplitude of +5V and +12V for various
applications.
In this section we have Transformer, Bridge rectifier, are connected serially and voltage regulators
for +5V and +12V (7805 and 7812) via a capacitor (1000µF) in parallel are connected parallel as
shown in the circuit diagram below. Each voltage regulator output is again is connected to the
capacitors of values (100µF, 10µF, 1 µF, 0.1 µF) are connected parallel through which the
corresponding output (+5V or +12V) are taken into consideration.
A transformer is a device that transfers electrical energy from one circuit to another through
inductively coupled electrical conductors. A changing current in the first circuit (the primary)
creates a changing magnetic field; in turn, this magnetic field induces a changing voltage in the
second circuit (the secondary). By adding a load to the secondary circuit, one can make current
flow in the transformer, thus transferring energy from one circuit to the other.
The secondary induced voltage VS, of an ideal transformer, is scaled from the primary VP by a
factor equal to the ratio of the number of turns of wire in their respective windings:
Basic principle :
The transformer is based on two principles: firstly, that an electric current can produce a
magnetic field (electromagnetism) and secondly that a changing magnetic field within a coil of
wire induces a voltage across the ends of the coil (electromagnetic induction). By changing the
current in the primary coil, it changes the strength of its magnetic field; since the changing
magnetic field extends into the secondary coil, a voltage is induced across the secondary.
A simplified transformer design is shown below. A current passing through the primary
coil creates a magnetic field. The primary and secondary coils are wrapped around a core of very
high magnetic permeability, such as iron; this ensures that most of the magnetic field lines
produced by the primary current are within the iron and pass through the secondary coil as well
as the primary coil. .An ideal step-down transformer showing magnetic flux in the core.
Induction law :
The voltage induced across the secondary coil may be calculated from Faraday's law of
induction, which states that:
If the secondary coil is attached to a load that allows current to flow, electrical power is
transmitted from the primary circuit to the secondary circuit. Ideally, the transformer is perfectly
efficient; all the incoming energy is transformed from the primary circuit to the magnetic field
and into the secondary circuit. If this condition is met, the incoming electric power must equal
the outgoing power.
If the voltage is increased (stepped up) (VS > VP), then the current is decreased (stepped
down) (IS < IP) by the same factor. Transformers are efficient so this formula is a reasonable
approximation.
If the voltage is increased (stepped up) (VS > VP), then the current is decreased (stepped down)
(IS < IP) by the same factor. Transformers are efficient so this formula is a reasonable
approximation.
The impedance in one circuit is transformed by the square of the turns ratio. For example,
if an impedance ZS is attached across the terminals of the secondary coil, it appears to the
primary circuit to have an impedance of
This relationship is reciprocal, so that the impedance ZP of the primary circuit appears to the
secondary to be
Detailed operation:
The simplified description above neglects several practical factors, in particular the
primary current required to establish a magnetic field in the core, and the contribution to the field
due to current in the secondary circuit.
Models of an ideal transformer typically assume a core of negligible reluctance with two
windings of zero resistance. When a voltage is applied to the primary winding, a small current
flows, driving flux around the magnetic circuit of the core. The current required to create the flux
is termed the magnetizing current; since the ideal core has been assumed to have near-zero
reluctance, the magnetizing current is negligible, although still required to create the magnetic
field.
The changing magnetic field induces an electromotive force (EMF) across each
winding. Since the ideal windings have no impedance, they have no associated voltage drop, and
so the voltages VP and VS measured at the terminals of the transformer, are equal to the
corresponding EMFs. The primary EMF, acting as it does in opposition to the primary voltage, is
sometimes termed the "back EMF". This is due to Lenz's law which states that the induction of
EMF would always be such that it will oppose development of any such change in magnetic
field.
B) Bridge Rectifier:
Basic Operation:
When the input connected at the left corner of the diamond is positive with respect
to the one connected at the right hand corner, current flows to the right along the upper colored
path to the output, and returns to the input supply via the lower one.
When the right hand corner is positive relative to the left hand corner, current flows along
the upper colored path and returns to the supply via the lower colored path.
If the normal load cannot be guaranteed to perform this function, perhaps because
it can be disconnected, the circuit should include a bleeder resistor connected as close as
practical across the capacitor. This resistor should consume a current large enough to discharge
the capacitor in a reasonable time, but small enough to avoid unnecessary power waste.
Because a bleeder sets a minimum current drain, the regulation of the circuit, defined as
percentage voltage change from minimum to maximum load, is improved. However in many
cases the improvement is of insignificant magnitude.
The capacitor and the load resistance have a typical time constant τ = RC where
C and R are the capacitance and load resistance respectively. As long as the load resistor is large
enough so that this time constant is much longer than the time of one ripple cycle, the above
configuration will produce a smoothed DC voltage across the load.
In some designs, a series resistor at the load side of the capacitor is added. The smoothing can
then be improved by adding additional stages of capacitor–resistor pairs, often done only for sub-
supplies to critical high-gain circuits that tend to be sensitive to supply voltage noise.
The idealized waveforms shown above are seen for both voltage and current when
the load on the bridge is resistive. When the load includes a smoothing capacitor, both the
voltage and the current waveforms will be greatly changed. While the voltage is smoothed, as
described above, current will flow through the bridge only during the time when the input
voltage is greater than the capacitor voltage. For example, if the load draws an average current of
n Amps, and the diodes conduct for 10% of the time, the average diode current during
conduction must be 10n Amps. This non-sinusoidal current leads to harmonic distortion and a
poor power factor in the AC supply.
Output can also be smoothed using a choke and second capacitor. The choke tends to
keep the current (rather than the voltage) more constant. Due to the relatively high cost of an
effective choke compared to a resistor and capacitor this is not employed in modern equipment.
Some early console radios created the speaker's constant field with the current from the high
voltage ("B +") power supply, which was then routed to the consuming circuits, (permanent
magnets were considered too weak for good performance) to create the speaker's constant
magnetic field. The speaker field coil thus performed 2 jobs in one: it acted as a choke, filtering
the power supply, and it produced the magnetic field to operate the speaker.
D) Voltage Regulator :
A voltage regulator is an electrical regulator designed to automatically maintain a
constant voltage level.
The 78xx (also sometimes known as LM78xx) series of devices is a family of self-contained
fixed linear voltage regulator integrated circuits. The 78xx family is a very popular choice for
many electronic circuits which require a regulated power supply, due to their ease of use and
relative cheapness.
When specifying individual ICs within this family, the xx is replaced with a two-digit
number, which indicates the output voltage the particular device is designed to provide (for
example, the 7805 has a 5 volt output, while the 7812 produces 12 volts). The 78xx line is
positive voltage regulators, meaning that they are designed to produce a voltage that is positive
relative to a common ground. There is a related line of 79xx devices which are complementary
negative voltage regulators. 78xx and 79xx ICs can be used in combination to provide both
positive and negative supply voltages in the same circuit, if necessary.
78xx ICs have three terminals and are most commonly found in the TO220 form
factor, although smaller surface-mount and larger TrO3 packages are also available from some
manufacturers. These devices typically support an input voltage which can be anywhere from a
couple of volts over the intended output voltage, up to a maximum of 35 or 40
volts, and can typically provide up to around 1 or 1.5 amps of current (though smaller or larger
packages may have a lower or higher current rating).
DTMF(Dual Tone Multiple Frequency)
DTMF:
Introduction :
Dual-Tone Multi-Frequency (DTMF) signaling is a standard telecommunication system
developed by Bell Laboratories. The DTMF signaling was proposed more than 30 years ago to
replace slower pulse dialing. Many things have changed since this time, but DTMF has become
the most popular addressing and messaging tool in telecommunications, and it does not look as
though it will fade away in foreseeable future. In this system, a matrix is used to compose a
signal, which consists of a lower frequency group containing four distinguished frequencies
which are below 1 KHz and a high frequency group also containing four distinguished
frequencies which are above 1 KHz (figure 2). Each telephone key contains a pair of
simultaneous low and high frequency tones.
Low frequency group
1336 Hz
1744 Hz
1633Hz
697 Hz 1 2 3 A
770 Hz 4 5 6 B
852 Hz 7 8 9 C
941Hz * 0 # D
To detect DTMF signals by software in the digital domain, many algorithms, including
Fast Fourier Transform (FFT), Goertzel DFT, Modified Goertzel Algorithm, Non-uniform
Discrete Fourier Transform (NDFT), Sub band NDFT, and Adaptive Frequency Estimation are
proposed. The Modified Goertzel Algorithm is one of the most accurate and computing-efficient
technologies for limited frequency detection. In DTMF tone detection cases, the Goertzel
Algorithm only transforms 8 frequencies instead of perform on an entire spectrum like FFT. This
saves a lot computational resources, which is critical for lower-power processors. Its non-
complexity is easy to adapt into small MCU and DSP.
We are using M8870 IC. The M-8870 is a full DTMF Receiver that integrates both band split
filter and decoder functions into a single 18-pin DIP or SOIC package. Manufactured using
CMOS process technology, the M-8870 offers low power consumption (35 mW max) and
precise data handling. Its filter section uses switched capacitor technology for both the high and
low group filters and for dial tone rejection. Its decoder uses digital counting techniques to detect
and decode all 16 DTMF tone pairs into a 4-bit code. External component count is minimized by
provision of an on-chip differential input amplifier, clock generator, and latched tri-state
interface bus. Minimal external components required include a low-cost 3.579545 MHz color
burst crystal, a timing resistor, and a timing capacitor. The M-8870-02 provides a “power-down”
option which, when enabled, drops consumption to less than 0.5 mW. The M-8870-02 can also
inhibit the decoding of fourth column digits.
The MT8870D/MT8870D-1 monolithic DTMF receiver offers small size, low power
consumption and high performance. It is a complete DTMF (Dual Tone Multiple Frequency)
receiver integrating both the band split filter and digital decoder functions. The filter section uses
switched capacitor techniques for high and low group filters; the decoder uses digital counting
techniques to detect and decode all 16 DTMF tone pairs into a 4-bit code. External component
count is minimized by on chip provision of a differential input amplifier, clock oscillator and
latched three-state bus interface.
Features:
• Power-down mode
• Inhibit mode
Pin Description:
3. GS : Gain Select. Gives access to output of front end differential amplifier for
Mid-rail
5. INH : Inhibit (Input). Logic high inhibits the detection of tones representing
6. PWDN : Power down (Input). Active high. Powers down the device and inhibits the
oscillator. This pin input is internally pulled down.
8. OSC2 : Clock (Output). A 3.579545 MHz crystal connected between pins OSC1 and
OSC2 completes the internal oscillator circuit.
10. TOE : Three State Output Enable (Input). Logic high enables the outputs Q1-Q4. This
pin is pulled up internally.
Q1-Q4 : Three State Data (Output). When enabled by TOE, provide the code corresponding to
the last valid tone-pair received (see Table 1). When TOE is logic low, the data outputs are high
impedance.
15. StD : Delayed Steering (Output).Presents a logic high when a received tone-pair has
been registered and the output latch updated; returns to logic low when the voltage on St/GT falls
below VTSt.
16. ESt : Early Steering (Output). Presents logic high once the digital algorithm has
detected a valid tone pair (signal condition). Any momentary loss of signal condition will cause
ESt to return to a logic low.
17. St/GT : Steering Input/Guard time (Output) Bidirectional. A voltage greater than VTSt
detected at St Causes the device to register the detected tone pair and update the output latch. A
voltage less than VTSt free the device to accept a new tone pair. The GT output acts to reset the
external steering time-constant; its state is a function of ESt and the voltage on St.
NC : No Connection.
Filter Section :
Separation of the low-group and high group tones is achieved by applying the DTMF signal to
the inputs of two sixth-order switched capacitor band pass filters, the bandwidths of which
correspond to the low and high group frequencies. The filter output is followed by a single order
switched capacitor filter section which smoothes the signals Prior to limiting. Limiting is
performed by high-gain comparators which are provided with hysteresis to prevent detection of
unwanted low-level signals.
Decoder Section :
Digital counting techniques to determine the frequencies of the incoming tones and to verify that
they correspond to standard DTMF frequencies. When the detector recognizes the presence of
two valid tones the “Early Steering” (ESt) output will go to an active state. Any subsequent loss
of signal condition will cause ESt to assume an inactive state.
Steering Circuit :
Before registration of a decoded tone pair, the receiver checks for a valid signal duration
(referred to as character recognition condition). This check is performed by an external RC time
constant driven by ESt. The steering circuit works in reverse to validate the interdigit pause
between signals. Thus, as well as rejecting signals too short to be considered valid, the receiver
will tolerate signal interruptions (dropout) too short to be considered a valid pause. This facility,
together with the capability of selecting the steering time constants externally, allows the
designer to tailor performance to meet a wide variety of system requirements.
Crystal Oscillator :
The internal clock circuit is completed with the addition of an external 3.579545 MHz crystal
Logic high applied to pin 6 (PWDN) will power down the device to minimize the power
consumption in a standby mode. It stops the oscillator and the functions of the filters.
Inhibit Mode :
Inhibit mode is enabled by a logic high input to the pin 5 (INH). It inhibits the detection of tones.
Applications:
Headset of Nokia
Wiring for the nokia 2.5mm 4-pole headset socket of Nokia 1100, 1101, 1110, 1600, 2100, 2300,
2500, 2650, 2652, 3210, 3310, 3330, 3410, 3510, 3510i, 3650, 3660, 5210, 6030, 6060, 6120,
6510, 6600, 7280, 7380 7650, 8210, 8310, 8800, 8850, 8890, 8910, 8910i cell phones (except
some smart phones
Pin Name Direction Description :
1 Tip Speaker+
2 Ring1 Microphone+
3 Ring2 Speaker -
4 Sleeve Microphone-
The answer/end button should be connected across the microphone connections. Microphone
impedance should be 1k4. Speaker is 30 Ohm.
RELAY :
A relay is used to isolate one electrical circuit from another. It allows a low current control
circuit to make or break an electrically isolated high current circuit path. The basic relay consists
of a coil and a set of contacts. The most common relay coil is a length of magnet wire wrapped
around a metal core. When voltage is applied to the coil, current passes through the wire and
creates a magnetic field. This magnetic field pulls the contacts together and holds them there
until the current flow in the coil has stopped. The diagram below shows the parts of a simple
relay.
Figure: Relay
Operation:
When a current flows through the coil, the resulting magnetic field attracts an armature that is
mechanically linked to a moving contact. The movement either makes or breaks a connection
with a fixed contact. When the current is switched off, the armature is usually returned by a
spring to its resting position shown in figure 6.6(b). Latching relays exist that require operation
of a second coil to reset the contact position.
By analogy with the functions of the original electromagnetic device, a solid-state relay operates
a thyristor or other solid-state switching device with a transformer or light-emitting diode to
trigger it.
SPST :
SPST relay stands for Single Pole Single Throw relay. Current will only flow through the
contacts when the relay coil is energized.
SPDT Relay :
SPDT Relay stands for Single Pole Double Throw relay. Current will flow between the movable
contact and one fixed contact when the coil is De-energized and between the movable contact
and the alternate fixed contact when the relay coil is energized. The most commonly used relay
in car audio, the Bosch relay, is a SPDT relay.
Figure: SPDT Relay
DPST Relay :
DPST relay stands for Double Pole Single Throw relay. When the relay coil is energized, two
separate and electrically isolated sets of contacts are pulled down to make contact with their
stationary counterparts. There is no complete circuit path when the relay is De-energized.
DPDT Relay :
DPDT relay stands for Double Pole Double Throw relay. It operates like the SPDT relay but has
twice as many contacts. There are two completely isolated sets of contacts.
Types of relay :
1. Latching Relay
2. Reed Relay
3. Mercury Wetted Relay
4. Machine Tool Relay
5. Solid State Relay (SSR)
Latching relay :
Latching relay, dust cover removed, showing pawl and ratchet mechanism. The ratchet operates
a cam, which raises and lowers the moving contact arm, seen edge-on just below it. The moving
and fixed contacts are visible at the left side of the image.
A latching relay has two relaxed states (bi-stable). These are also called "impulse", "keep", or
"stay" relays. When the current is switched off, the relay remains in its last state. This is achieved
with a solenoid operating a ratchet and cam mechanism, or by having two opposing coils with an
over-center spring or permanent magnet to hold the armature and contacts in position while the
coil is relaxed, or with a remanent core. In the ratchet and cam example, the first pulse to the coil
turns the relay on and the second pulse turns it off. In the two coil example, a pulse to one coil
turns the relay on and a pulse to the opposite coil turns the relay off. This type of relay has the
advantage that it consumes power only for an instant, while it is being switched, and it retains its
last setting across a power outage. A remanent core latching relay requires a current pulse of
opposite polarity to make it change state.
Reed relay :
A reed relay has a set of contacts inside a vacuum or inert gas filled glass tube, which protects
the contacts against atmospheric corrosion. The contacts are closed by a magnetic field generated
when current passes through a coil around the glass tube. Reed relays are capable of faster
switching speeds than larger types of relays, but have low switch current and voltage ratings.
Mercury-wetted relay:
A mercury-wetted reed relay is a form of reed relay in which the contacts are wetted with
mercury. Such relays are used to switch low-voltage signals (one volt or less) because of their
low contact resistance, or for high-speed counting and timing applications where the mercury
eliminates contact bounce. Mercury wetted relays are position-sensitive and must be mounted
vertically to work properly. Because of the toxicity and expense of liquid mercury, these relays
are rarely specified for new equipment. See also mercury switch.
A machine tool relay is a type standardized for industrial control of machine tools, transfer
machines, and other sequential control. They are characterized by a large number of contacts
(sometimes extendable in the field) which are easily converted from normally-open to normally-
closed status, easily replaceable coils, and a form factor that allows compactly installing many
relays in a control panel. Although such relays once were the backbone of automation in such
industries as automobile assembly, the programmable logic controller (PLC) mostly displaced
the machine tool relay from sequential control applications.
Solid-state relay :
A solid state relay (SSR) is a solid state electronic component that provides a similar function
to an electromechanical relay but does not have any moving components, increasing long-term
reliability. With early SSR's, the tradeoff came from the fact that every transistor has a small
voltage drop across it. This voltage drop limited the amount of current a given SSR could handle.
As transistors improved, higher current SSR's, able to handle 100 to 1,200 Amperes, have
become commercially available. Compared to electromagnetic relays, they may be falsely
triggered by transients.
Rating of contacts – small relays switch a few amperes, large contactors are rated for up
to 3000 amperes, alternating or direct current
Voltage rating of contacts – typical control relays rated 300 VAC or 600 VAC,
automotive types to 50 VDC, special high-voltage relays to about 15 000 V
Coil voltage – machine-tool relays usually 24 VAC, 120 or 250 VAC, relays for
switchgear may have 125 V or 250 VDC coils, "sensitive" relays operate on a few milli-
amperes
Applications :
Relays are used:
Internal Clock frequency of microcontroller is 12MHz, in order to trigger the controller we have
to give the external clock frequency or external clock pulses i.e., 11.0592 MHz approximately it
is generated by the quad crystal from pins 18 & 19 in controller (XLAT1 & XLAT2).For
resetting the controller we have to connect a capacitor, a resister and a switch to 9 pin in
controller.
Relay is used for automatic switching purpose or On/Off the motor. The relay is connected to
port 2.6; here relay is 5-pin in that 2-pins is for GND and Vcc,1 pin is fan and remaining two
pins are used for normally open and normally closed. Motor is connected to normally open pin to
the relay. Second relay is connected to bulb.
CODING
#include <reg51.h>
#include <string.h>
#include "lcd.h"
sbit a1=P0^0;
sbit a2=P0^1;
sbit a3=P0^2;
sbit a4=P0^3;
void main(void)
a1=0;
a2=0;
LCD_init();
while(1)
a=P2;
if((a&0xff)==0xe1)
a++;
if(a==4)
a=0;
if((a&0xff)==0xe2 )
{
b++;
if(b==4)
b=0;
if((a&0xff)==0xe3)
c++;
if(c==4)
c=0;
if((a&0xff)==0xe4)
d++;
if(d==4)
d=0;
if((a&0xff)==0xe5)
if((a&0xff)==0xe6)
}
if((a&0xff)==0xe7)
if((a&0xff)==0xe8)
if((a&0xff)==0xe9 )
if((a&0xff)==0xea )
if(a==3)
a1=1;
LCD_puts("BULB ON ");
if(b==3)
a1=0;
LCD_puts("BULB OFF");
if(c==3)
{
a2=1;
LCD_puts("FAN ON ");
if(d==3)
a2=0;
LCD_puts("FAN OFF");
LCD :
#include <reg51.h>
#include<stdio.h>
sbit LCD_en=P1^2;
sbit LCD_rs=P1^3;
/***************************************************
* Prototype(s) *
***************************************************/
void LCD_enable();
void LCD_init();
/***************************************************
* Sources *
***************************************************/
unsigned char n;
unsigned int i;
for (n=0; n<ms; n++)
void LCD_enable()
LCD_delay(1);
LCD_enable();
LCD_enable();
LCD_delay(1);
LCD_enable();
LCD_enable();
LCD_delay(1);
while (*lcd_string)
LCD_putc(*lcd_string++);
void LCD_init()
LCD_command(0x33);
LCD_command(0x32);
LCD_command(0x28);
LCD_command(0x0C);
LCD_command(0x06);
LCD_command(0x01); /* Clear */
LCD_delay(256);
switch(row-1)
break;
break;
break;
break;
LCD_command(Temp|0x80);
}
void PRINT_long( int Data)
char Arr[9],i=0;
if(Data=='\0'||Data==0)
LCD_putc('0');
return;
do
Arr[i++]=Data%10;
Temp/=10;
Data=Temp;
}while(Temp>0);
while(i--)
LCD_putc(Arr[i]+48);
}
CONCLUSION
The project “advance security using mobile phone” is used for the controlling the devices
which are operated by the mobile phone. To prove this practically we use a mobile phone as the
transmitter part. In the receiver part we have DTMF receiver, relays which are connected to the
devices.
APPLICATIONS :
They are used at the security purpose places like shopping malls, offices, software companies,
house, apartments, star hotels, film theaters.
BIBLIOGRAPHY :
Kenneth J. Ayala
www.national.com
www.atmel.com
www.microsoftsearch.com
www.geocities.com
www.google.com