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PIC & S12X

PIC & S12X

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Published by PRASATH.R
question bank on pic & s12x
question bank on pic & s12x

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Published by: PRASATH.R on Feb 02, 2011
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08/16/2013

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PIC & S12X MICROCONTROLLER
R.PRASATH Page 1
IV-ECE-B1.
 
Harvard architecture
has the program memory and data memory as separate memories andthey are accessed from separate buses.2.
 
Von Neumann architecture
in which program and data fetched from same memory using thebuses.3.
 
High performance, cost effective and field programmable embedded control solutions are the
advantages
of PIC controllers.4.
 
PIC stands for
Peripheral Interface Controller
coined by Microchip Technologies.5.
 
PIC has
14
sources or types of interrupt.6.
 
There are 3 timers/counters inside the PIC16f877a Microcontrollers,
 
Timer0:
8 bit timer
 
 
Timer1:
16 bit timer
 
 
Timer2:
8 bit timer with 8 bit period register
.7.
 
Timeout bit in status flag will be set (
disabled
) during power up,
CLRWDT
instruction or
SLEEP
 instruction. Timeout bit in status flag will be cleared (
enabled
) when
WDT timeout occurred
.8.
 
Power down bit in status flag will be set (
disabled)
during power up,
CLRWDT
instruction. Powerdown bit in status flag will be cleared
(enabled
) by the execution of 
SLEEP
instruction.9.
 
Program memory of 
8k
is divided into 4 banks as
2k
per bank.10.
 
Stack in PIC are
8
level deep and
13
bit wide operates as a
circular buffer
because ninth pushoverwrites the first push value.11.
 
Program Counter is also
13
bit wide.PCL register as the lower part of PC which can be bothreadable and writable, but upper bits PC<12:8>are not readable but writable only through
PCLATH register
.12.
 
If the data is moved to any of the register by pointing the address of memory location then it iscalled
direct addressing
.13.
 
If the data is addressed indirectly using a address pointer then it is called
indirect addressing
.14.
 
If the immediate data is moved to any of the register then it is called as
immediate addressing
.15.
 
Each instruction in PIC is
14bit word
and executed in single instruction cycle (
4 oscillatorperiods
).16.
 
PIC 16f877a controllers have
5 I/O ports having 33 pins
can be configured either as input oroutput by using
TRIS
register (if TRIS=1- input, 0-output).17.
 
Input pins
<b7:b4>
are compared with the old value latched on the last read of PORTB.Themismatch outputs of<b7:b4> are OR’ed together to generate
RB port change interrupt
.
 
PIC & S12X MICROCONTROLLER
R.PRASATH Page 2
IV-ECE-B18.
 
The internal oscillator selection is to
synchronize the clock
with the external oscillator, theinternal oscillator types are;
Low Power crystal (LP), crystal (XT), High speed crystal (HS), Resistor/Capacitor (RC)
.19.
 
For
timing insensitive and low cost applications
we will use RC oscillator option whichgenerates the frequency according to the values of REXT and CEXT.20.
 
Power on Reset (POR)
pulse is generated when VDD rise is in range 1.2 to 1.7v.21.
 
Power up timer (PWRT)
provides a 72 ms nominal timeout generated using internal RCoscillator after POR. It is designed so as to maintain reset until power supply stabilizes.22.
 
Oscillator Start up timer (OST)
provides a 1024 Oscillator cycle delay using external oscillatorafter the PWRT.23.
 
Brown out Reset (BOR)
will reset the device when VDD falls below VBOR (4v) for a certain timeinterval (TBOR).24.
 
Watch dog timer
is a free running On chip RC oscillator which does not depend upon externalcomponents will reset the device when WDT overflow was occurred. We can prevent WDT resetby clearing the WDT (
CLRWDT instruction
) before it expires.25.
 
Using WDT we can realize periodic interrupt from the range
18ms to 2.3 seconds
.26.
 
The methods to wake up the device from sleep mode(low current power down mode) are;
 
External Reset input on MCLR pin
 
WDT overflow reset.
 
Interrupt from INT pin, PORTB read change interrupt, EEPROM write complete
.27.
 
Timer is used to generate accurate
pulses and delay
parallely without disturbing the exec speed.28.
 
The
difference between timer and counter
is, Timer counts the internal clock pulses generatedto execute the instructions and counter counts the external clock pulse given to count thearrivals of the event.29.
 
Using
Prescalar Assignment (PSA) bit in Option register
we can assign the prescalar values foreither Timer0 or WDT.30.
 
During
synchronized counter mode
, external clock pulse is synchronized with internal phaseclocks. So during Sleep it won’t work because of shut down of internal clock generation.31.
 
During
Asynchronous counter mode
, counter continues to increment asynchronous withinternal phase clocks. So during sleep it will work because of the absence of synchronization.32.
 
The Current value of the 16 bit timer1 (TMRH: TMRL) is captured to CCPR1 (CCPR1H:CCPR1L)and interrupts can be generated, when a signal is detected in RC2/CCP1 pin .(
CAPTURE MODE
)
 
PIC & S12X MICROCONTROLLER
R.PRASATH Page 3
IV-ECE-B33.
 
The incrementing values of Timer1 (TMRH: TMRL) are compared with preloaded value of CCPR1(CCPR1H:CCPR1L) acts a 16 bit programmable period register. In case of match, interrupts orspecial event triggers can be generated on RC2/CCP1 pin.(
COMPARE MODE
)34.
 
PWM signals are generated with the help of incrementing values of Timer2 compared withCCPR1H (
duty cycle slave
) and PR (
PWM period
) registers.35.
 
PWM signals are
applied
to control the speed of dc motor, direction of the servo motor andlight intensity of LED.36.
 
ADC has option of either
10/8 bit resolution
.37.
 
Universal Synchronous Asynchronous Receiver Transmitter(
USART
) is also known as SerialCommunication Interface(
SCI
) can be configured either as
full duplex
to communicate withcomputers or
half duplex
to communicate with A/D or D/A or Serial EEPROM.38.
 
USART Master Device having the capability to
generate the clock pulses
and Slave devicecannot.39.
 
The
Relay
is an electromechanical device which transforms the electrical signal into mechanicalswitching movement.40.
 
Context Switching
refers to the Pushing of current PC values, status register values and specialregister values into stack before executing normal routines or Interrupt service routines.41.
 
Operating System
can be used to describe the collection of software that manages a system’shardware resources.42.
 
When a multitasking kernel decides to run a different task, it simply saves the current task'scontext (CPU registers) in its stack. Once this operation is performed, the new task‘s context isrestored from its storage area and then resumes execution of the new task's code. This processis called a
context switch or a task switch
.43.
 
A
semaphore
is a protocol mechanism offered by most multitasking kernels. Semaphores areused to:
 
Control access to a shared resource (mutual exclusion)
 
Signal the occurrence of an event
 
Allow two tasks to synchronize their activities44.
 
The idea of the XGATE in S12x controller was born out of the need to greatly improveapplication responsiveness and coherency through a reduction in the
interrupt loading on themain CPU.

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