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XA10
XA12
XA15
XA11
XA13
XA14
XA16
( 3.3V ) ( 3.3V ) ( 1.8V )
XA0
XA2
XA5
XA7
XA1
XA3
XA4
XA6
XA8
XA9
107
121
143
159
170
101
109
117
126
139
146
154
167
151
152
153
156
157
158
161
162
163
164
165
168
169
172
173
174
175
U1 XD[0..15]
84
71
93
15
23
29
61
XD[0..15]
4
D D
VDD3VFL.1
VDDIO(3V3).1
VDDIO(3V3).2
VDDIO(3V3).3
VDDIO(3V3).4
VDDIO(3V3).5
VDDIO(3V3).6
VDDIO(3V3).7
VDDIO(3V3).8
VDD(1V8).1
VDD(1V8).2
VDD(1V8).3
VDD(1V8).4
VDD(1V8).5
VDD(1V8).6
VDD(1V8).7
VDD(1V8).8
VDD(1V8).9
VDD(1V8).10
VDD(1V8).11
VDD(1V8).12
VDD(1V8).12
GPIO40/XA0/XWE1n
GPIO41/XA1
GPIO42/XA2
GPIO43/XA3
GPIO44/XA4
GPIO45/XA5
GPIO46/XA6
GPIO47/XA7
GPIO80/XA8
GPIO81/XA9
GPIO82/XA10
GPIO83/XA11
GPIO84/XA12
GPIO85/XA13
GPIO86/XA14
GPIO87/XA15
GPIO39/XA16
ADCINA0 42
ADCINA0 ADCINA0
ADCINA1 41
ADCINA1 ADCINA1
ADCINA2 40
ADCINA2 ADCINA2
ADCINA3 39
ADCREFP/ADCREFM caps are ADCINA3 ADCINA3
ADCINA4 38
ADCINA4 ADCINA4 FLASH - 3.3V
0805 size. Use biggest trace ADCINA5 37 136 XD0
ADCINA5 ADCINA5 GPIO79/XD0
allowable with no vias to ADCINA6 36 135 XD1
ADCINA6 ADCINA6 GPIO78/XD1
ADCINA7 35 134 XD2
connect these to processor ADCINA7 ADCINA7 VDD I/0 -3.3V VDD CORE - 1.8V-1.9V GPIO77/XD2
133 XD3
ADCINB0 GPIO76/XD3 XD4
ADCINB0 46 ADCINB0 GPIO75/XD4 132
ADCLO IS TIED DIRECTLY TO PLANE ADCINB1 47 131 XD5
ADCINB1 ADCINB1 GPIO74/XD5
ADCINB2 48 130 XD6
ADCINB2 ADCINB2 GPIO73/XD6
ADCINB3 49 129 XD7
ADCINB3 ADCINB3 GPIO72/XD7
ADCINB4 50
AGND ADCINB4 ADCINB4
ADCINB5 51 128 XD8
ADCINB5 ADCINB5 GPIO71/XD8
ADCINB6 52 127 XD9
ADCINB6 ADCINB6 GPIO70/XD9
ADCINB7 53 124 XD10
ADCINB7 ADCINB7 GPIO69/XD10
ADCREFP 123 XD11
ADCREFP GPIO68/XD11
C1 2.2uF CERAMIC LOW ESR 56 122 XD12
ADCREFM ADCREFP GPIO67/XD12 XD13
55 ADCREFM GPIO66/XD13 119
ADCREFM C2 2.2uF CERAMIC LOW ESR XD14
GPIO65/XD14 116
R1 22.1K 57 115 XD15
ADCREFIN ADCRESEXT GPIO64/XD15
C ADCREFIN 54 ADCREFIN C
VREFLO 43 148 RN1A 1 33
VREFLO ADCLO GPIO35/SCITXDA/XRnW RN1B A B 16 33 XRnW
XRDn 149 2 A B 15
RN1C 33 XRDn
GPIO0 5 GPIO0/EPWM1A GPIO38/XWE0n 137 3 A B 14 XWEn
GPIO1 6 GPIO1/EPWM1B/ECAP6/MFSRB
R2 7 145 RN1D 4 13 33
GPIO2 GPIO2/EPWM2A GPIO36/SCIRXDA/XZCS0n A B XZCS0n
0 10 150 RN1E 5 12 33
GPIO3 GPIO3/EPWM2B/ECAP5/MCLKRB GPIO37/ECAP2/XZCS7n A B XZCS7n
GPIO4 11 GPIO4/EPWM3A GPIO34/ECAP1/XREADY 142 XREADY
GPIO5 12 GPIO5/EPWM3B/MFSRA/ECAP1 TMS320F28335 - 176 QFP GPIO34
GPIO6 13 GPIO6/EPWM4A/EPWMSYNCI/EPWMSYNCO
GPIO7 16 GPIO7/EPWM4B/MCLKRA/ECAP2
AGND 17 RN1F 6 11 33
GPIO8 GPIO8/EPWM5A/CANTXB/ADCSOCAOn A B XZCS6n
GPIO9 18 GPIO9/EPWM5B/SCITXDB/ECAP3
GPIO10 19 GPIO10/EPWM6A/CANRXB/ADCSOCBOn
GPIO11 20 GPIO11/EPWM6B/SCIRXDB/ECAP4 GPIO28/SCIRXDA/XZCS6n 141 GPIO28
GPIO12 21 GPIO12/TZ1n/CANTXB/MDXB GPIO29/SCITXDA/XA19 2 GPIO29
GPIO13 24 GPIO13/TZ2n/CANRXB/MDRB
GPIO31/CANTXA/XA17 176 GPIO31
GPIO16 27 GPIO16/SPISIMOA/CANTXB/TZ5n GPIO30/CANRXA/XA18 1 GPIO30
GPIO17 28 GPIO17/SPISOMIA/CANRXB/TZ6n
GPIO18 62 GPIO18/SPICLKA/SCITXDB/CANRXA
GPIO19 63 GPIO19/SPISTEAn/SCIRXDB/CANTXA
GPIO20 64 GPIO20/EQEP1A/MDXA/CANTXB
GPIO21 65 GPIO21/EQEP1B/MDRA/CANRXB
B GPIO22 66 GPIO22/EQEP1S/MCLKXA/SCITXDB B
GPIO23 67 GPIO23/EQEP1I/MFSXA/SCIRXDB
GPIO24 68 GPIO24/ECAP1/EQEP2A/MDXB GPIO14
GPIO25 69 GPIO25/ECAP2/EQEP2B/MDRB
GPIO26 72 GPIO26/ECAP3/EQEP2I/MCLKXB GPIO14/TZ3n/XHOLDn/SCITXDB/MCLKXB 25 XHOLDn
GPIO27 73 GPIO27/ECAP4/EQEP2S/MFSXB GPIO15/TZ4n/XHOLDAn/SCIRXDB/MFSXB 26 XHOLDAn
GPIO32 74 GPIO32/SDAA/EPWMSYNCI/ADCSOCAOn
GPIO33 75 GPIO33/SCLA/EPWMSYNCO/ADCSOCBOn GPIO15
88 TP1
GPIO48 GPIO48/ECAP5/XD31 1TEST POINT
GPIO49 89 GPIO49/ECAP6/XD30
90 138 R3 33
GPIO50 GPIO50/EQEP1A/XD29 XCLKOUT XCLKOUT
GPIO51 91 GPIO51/EQEP1B/XD28
GPIO52 94 GPIO52/EQEP1S/XD27 XRSn 80 XRSn
GPIO53 95 GPIO53/EQEP1I/XD26
96 ADC 78 TRSTn
GPIO54 GPIO54/SPISIMOA/XD25 TRSTn TCK TRSTn
GPIO55 97 GPIO55/SPISOMIA/XD24 TCK 87 TCK
98 79 TMS
GPIO56 GPIO56/SPICLKA/XD23 TMS TDI TMS
99 76
VSSAIO(AGND)
VDDAIO(A3V3)
TDO
VSSA2(AGND)
100 77
VDDA2(A3V3)
(NC) TEST2
(NC) TEST1
110 85
VSS1AGND
VSS2AGND
XCLKIN
112
VSS.10
VSS.11
VSS.12
VSS.13
VSS.14
VSS.15
VSS.16
VSS.17
VSS.18
VSS.19
VSS.19
VSS.20
VSS.21
GPIO61 GPIO61/MFSRB/XD18
VSS.1
VSS.2
VSS.3
VSS.4
VSS.5
VSS.6
VSS.7
VSS.8
VSS.9
X1
X2
GPIO63 GPIO63/SCITXDC/XD16
A A
103
106
108
118
120
125
140
144
147
155
160
166
171
104
102
105
31
59
32
58
34
33
45
44
14
22
30
60
70
83
92
82
81
TMS320F28335GF
3
8
VDDA_1V8 VDDA_1V8
( 1.8V ) ( 1.8V ) XCLKIN
VDDA_1V8
VDDA_1V8 Title
VDDA_3V3 ( 3.3V ) SINGLE POINT CONNECTION TMS320F2833x 176-Pin LQFP Reference Design - DSP
VDDA_3V3
AGND Size Document Number Rev
VDDA_3V3 ( 3.3V ) B 2
VDDA_3V3
Date: Thursday, December 20, 2007 Sheet 1 of 9
5 4 3 2 1
5 4 3 2 1
VDD VDDIO
2 VDDIO
VDD
VDDIO
+ CT3
22uF C12 C13 C14 C15 C16
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
C C
VDDA_1V8
1.9V L1
VDDA_1V8
BLM21P221SN
C17 C18 C19 ( 1.8V )
1uF 0.1uF 0.001uF
AGND
3.3V
B
L2 VDDA_3V3 B
VDDA_3V3
BLM21P221SN
C20 C21 C22 ( 3.3V )
1uF 0.1uF 0.001uF
R4 1 2 0 TP2
VDDA_3V3 1 TEST POINT
U2 AGND
1 IN
GND 3
2 OUT
C23
0.47uF REF3020
A A
AGND
JP1
AGND 1 2 ADCREFIN
A B ADCREFIN
Title
JMP-2MM TMS320F2833x 176-Pin LQFP Reference Design - Decoupling caps
Decoupling caps in this page are for the DSP supply rails. They should be placed as close as possible to the supply pins. Date: Thursday, December 20, 2007 Sheet 2 of 9
5 4 3 2 1
5 4 3 2 1
VDDIO
3.3V
2 VDDIO
VDD
R5 R6 R7 R8 2 VDD
D
20K 20K 20K 20K D
XA[0..16] XA[0..16]
SW1
R9 2.2K 1 8 XA12
R10 2.2K 2 7 XA13
R11 2.2K 3 6 XA14
R12 2.2K 4 5 XA15
SW DIP-4/SM
Boot-mode selection DIP switch. Refer to the device data-sheet for boot-mode options.
C C
L3
VDDIO
U3
1 4 C24 C25 BLM21P221SN
OE VDD
2 3 22 pF 0.1 uF
GND OUT
OSC
R13
2 1 XCLKIN
33
B B
3.3V
3.3V
2
DS1
LTST-C150GKT
C26 GREEN
U4 0.1uF
5
R14
1
GPIO32 2 4
1
XF 220
SN74AHC1G14
3
A A
Diagnostic L.E.D
Title
TMS320F2833x 176-Pin LQFP Reference Design - Boot-mode select, OSC
3.3V
10K 10K
I2C_ROM_WP
R17 R18
4.99K 4.99K
U5 3.3V
1 A0 VCC 8
I2C_ROM_ADD I2C_ROM_ADD 2 7
A1 WP SCLA
3 NC1 SCL 6 GPIO33
4 5 SDAA
VSS SDA GPIO32
24WC256
DSP
C C
3.3V XD[0..15]
C27
0.1uF
C28
0.1uF
ASRAM
XA[0..16]
11
33
U6
VDD1
VDD2
XA0 1 7 XD0
XA1 A0 D0 XD1
2 A1 D1 8
XA2 3 9 XD2
XA3 A2 D2 XD3
4 A3 D3 10
XA4 5 13 XD4
XA5 A4 D4 XD5
B 18 A5 D5 14 B
XA6 19 15 XD6
XA7 A6 D6 XD7
20 A7 D7 16
XA8 21 29 XD8
XA9 A8 D8 XD9
24 A11 D9 30
XA10 25 31 XD10
XA11 A12 D10 XD11
26 A13 D11 32
XA12 27 35 XD12
XA13 A14 D12 XD13
42 A15 D13 36
XA14 43 37 XD14
XA15 A16 D14 XD15
44 A17 D15 38
XA16 22 A9
23 A10
NC 28
XZCS7n 6 CS
XWEn 17 WE
41 64Kx16, 128Kx 16 and 256Kx 16
XRDn OE
Compatible
40 BHE
VSS1
VSS2
39 BLE
IS61LV6416-12T
12
34
A A
Title
TMS320F2833x 176-Pin LQFP Reference Design - Memory
5 4 3 2 1
5 4 3 2 1
D D
3.3V
10
C29 1
0.1uF 6
2
7
U7 3
5 AB VCC 3 JP2 8
4
GPIO19 1 7 CANHA R19 120 2 1 9
TXD CANH B A
5
GPIO18 4 6 CANLA
RXD CANL JMP-2MM P1
11
8 2 DB9F
C RS GND C
SN65HVD235
10
3.3V
1
6
2
7
C30 3
0.1uF 8
4
JP3 9
U8 5
5 3 R20 120 2 1
AB VCC B A P2
11
GPIO20 1 7 CANHB DB9F
TXD CANH JMP-2MM
GPIO21 4 6 CANLB
B RXD CANL B
8 RS GND 2
SN65HVD235
A A
Title
TMS320F2833x 176-Pin LQFP Reference Design - CAN
D D
3.3V
C31
0.1uF
U9
3
VCC
M3
C C
7 DIN1 DOUT1 22
GPIO22 UART_TXDB 8 21
DIN2 DOUT2 P3B
9 DIN3 DOUT3 20 T1
SCI-B T6 DB9-STACKED
10 19 PCRXDB T2
UART_RXDB ROUT1 RIN1
GPIO23 11 ROUT2 RIN2 18 T7
12 17 PCTXDB T3
ROUT3 RIN3
13 ROUT4 RIN4 16 T8
14 ROUT5 RIN5 15 T4
T9
5 T5 SCI-B
EN
23 STBY
M4
6 C1+
24 C32 3.3V
C1-
VDD 1
C33 2 C2+ 0.1uF
4 C2-
0.1uF
C34 28 25
C3+ VSS
26 C3-
0.1uF C35
C36
GND
0.1uF
B 0.1uF B
SN75LV4737A
27
A A
Title
TMS320F2833x 176-Pin LQFP Reference Design - SCI
D D
GPIO expansion
J1
GPIO0 1
GPIO1 2
GPIO2 3
GPIO3 4 Analog expansion
GPIO4 5
GPIO5 6
GPIO6 J2
7 ADCINA0
GPIO7 8 ADCINA0 1 2
ADCINA1
GPIO8 9 ADCINA1 3 4
ADCINA2
GPIO9 10 ADCINA2 5 6
ADCINA3
GPIO10 11 ADCINA3 7 8
ADCINA4
GPIO11 12 ADCINA4 9 10
ADCINA5
GPIO12 13 ADCINA5 11 12
ADCINA6
C GPIO13 14 ADCINA6 13 14 C
ADCINA7
GPIO14 15 ADCINA7 15 16
GPIO15 16
CON16A
CON16
AGND
J3
ADCINB0
ADCINB0 1 2
J4 ADCINB1
ADCINB1 3 4
ADCINB2
GPIO16 1 ADCINB2 5 6
ADCINB3
GPIO17 2 ADCINB3 7 8
ADCINB4
GPIO18 3 ADCINB4 9 10
ADCINB5
GPIO19 4 ADCINB5 11 12
ADCINB6
GPIO20 5 ADCINB6 13 14
ADCINB7
GPIO21 6 ADCINB7 15 16
GPIO22 7
GPIO23 CON16A
8
GPIO24 9 AGND
GPIO25 10
GPIO26 11
GPIO27 12
GPIO28 13
GPIO29 14
GPIO30 15
B GPIO31 16 B
CON16
A A
Title
TMS320F2833x 176-Pin LQFP Reference Design - I/O Expansion
470 470
HEADER 7X2
C38 C39
0.1uF 0.1 uF
JTAG
C C
1 CH1 J5
R24
1.5K CON3
CM1215
1
2
3
-RESET R25
2
PONRSn 1.5K
1
SW PUSHBUTTON SW2
1
C41
2
B B
22nF
Reset circuitry
Locate all components of the reset circuitry close to
the DSP XRSn pin for best EMI/ESD noise immunity.
A A
Title
TMS320F2833x 176-Pin LQFP Reference Design - JTAG & Reset
D
+5V D
18.2K 1.899V
P5 U11 16.9K 1.848V
CENTER 5 28 15.0K 1.773V
1INA 1RESET 13.7K 1.722V VDD 1.9V
SHUNT 1 6 1INB
SLEEVE C42
R27 + CT5 4 23
RASM712 220 47uF 1EN 1OUTA
0.1uF 1OUTB 24
25 R28 R29 C43
+5V Max 1FB/SENSE NO-POP 18.2K, 1% + CT6
3 1GND 22uF 0.1uF
22
R30 30.1K, 1%
DS2 11 22
LTST-C150GKT 2INA 2RESET VDDIO
12 2INB
GREEN C44 3.3V
10 2EN 2OUTA 17
0.1uF 18
2OUTB
1
2SENSE 19
9 C45
2GND + CT7
22uF 0.1uF VDD3VFL
THERMAL_PAD
1 NC1 NC12 15
2 NC2 NC11 16
C
7 NC3 NC10 20 C
8 NC4 NC9 21
13 NC5 NC8 26
14 27 C46 C47
NC6 NC7 1uF 0.1uF
TPS767D301
29
TIE TPS767D301 POWER PAD TO GND
PLANE (TI-SLMA002)
PONRSn
PONRSn
B B
1 J6
NO-POP
A A
Title
TMS320F2833x 176-Pin LQFP Reference Design - Power