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Reduction of Conducted EMI in SMPS Using EMI Filter

Reduction of Conducted EMI in SMPS Using EMI Filter

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Published by Bharadwaj Santhosh

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Published by: Bharadwaj Santhosh on Feb 27, 2011
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07/02/2012

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Abstract 
 
 
almost every electronic device requires some levelof power conversion in which the required operational voltagesare generated from the input power. Using switched modepower supply (SMPS) for this purpose generates higher level of conducted EMI in the high frequency range and it negativelyaffects  the  performance  of  other  near  by  electronics.  Soprediction  of  conducted  EMI  is  necessary.  Time  domainsimulation plus Fast Fourier Transform (FFT) is a good methodto predict the conducted EMI. In this paper the Boost PFCcircuit is modeled considering parasitic parameters for all thecomponents. This circuit is simulated using PSPICE and theconducted EMI is predicted. The EMI filter is one of thetechniques to reduce the conducted EMI. The combined CMand DM mode filter configuration is discussed. For differentfilter component values the circuit is simulated using PSPICE.A better configuration is suggested from the simulated models.
Index Terms
Common mode (CM), differential mode (DM),electromagnetic interference (EMI), PFC converter
I.
INTRODUCTION
An  electromagnetic  disturbance  is  any  electromagneticphenomenon which may degrade the performance of a deviceor equipment or a system. The electromagnetic disturbancecan be in nature of the electromagnetic noise, or an unwantedsignal,  or  a  change  in  the  propagation  medium  itself.Electromagnetic  interference  is  the  degradation  in  theperformance of a device or equipment or a system caused byan electromagnetic disturbance. So improve the performanceof a device or equipment or a system the EMI has to bereduced.In  [1]  the  conducted  EMI  of the  CCM PFC circuit  ispredicted using a simulation circuit also DM and CM loopmodels of the PFC EMI are proposed for describing the noisegeneration and propagation mechanisms. It also describes theeffects of PFC inductor and the parasitic capacitances at theMOSFET drain node.The EMI spectrum of a discontinuous conduction mode PFCconverter is predicted using a simulation circuit in saber in[2]. It also gives the design guide lines on circuit layout andpackaging for EMI noise minimization. In [3] the frequencydomain analysis of the boost PFC is explained. In that paper 
the  noise  sources  and  all  other  circuit  components  areexpressed as functions in the frequency domain  and thepredicted EMI spectrum is calculated by solving the matrixesformed by these functions.The common mode and differential mode switching noisetogether with the input filter design and lot of designconsiderations such as printed circuit board layout, the effectof gate snubber, the shield inserted between the device andthe heat sink and also the heat sink grounding connectionsare described in [4]. It also reports the conducted EMImeasurements for different filter capacitor values andplacements, for different power switch drive circuits whichturned out to be decisive factors in the reduction of thegenerated EMI.In [5] PFC noise source characteristics and its effect on EMInoise, impedance mismatch and filter parasitic parametersare discussed. PFC DM and CM noise source models andtheir characteristics are analyzed. A filter is built and theanalysis is verified.The  basics  of conducted  EMI measurement,  suppressiontechniques and discussed in [6].it also explains how to designfilter theoretically and making modifications using practicalapproach to get a fast and accurate filter solution. In [7] a very practical EMI filter design according to militarystandard MIL-STD 461 is discussed. In [8] design procedurefor ac line EMI filters are discussed. This procedure is basedon the analysis of conducted EMI problems and the use of EMI diagnostic tool, noise separator.EMC design aspects for high power ac/dc rectifier and somedesign guide lines are discussed in [9].other papers in thissubject includes[10],[11],[12] and so on.An overview of boost PFC circuit, parasitic model of boostPFC components are described in section II. Prediction of conducted  EMI  using  simulation  circuit  is  explained  insection  III.  Section  IV  explains  CM  and  DM  filter arrangement and different filter configurations. Section Vconcludes the work.II. PARASITIC MODEL OF BOOST CONVERTER 
Reduction of Conducted EMI in SMPS usingEMI Filter 
Document By
SANTOSH BHARADWAJ REDDY
 
Engineeringpapers.blogspot.comMore Papers and Presentations available on above site
1
 
COMPONENTSFig 1 shows the simulation circuit in  PSPICE for BoostPFC.  Diodes used here are MUR140; the input is ac 220V,50 Hz. The MOSFET used here is IRPF450.The gate drivingcircuit is 100 KHz, square pulse generator.  In the On-state,i.e., MOSFET is turned ON, resulting in an increase in theinductor current; thereby energy is stored in the inductor.Inthe Off-state, i.e., MOSFET is turned OFF, and the only pathoffered to the inductor current is fly back diode D5, thecapacitor C1 and the load R1. This result in transferring theenergy accumulated during the On-state into the capacitor.The Boost PFC can be operated  in two modes. One iscontinuous  conduction  mode  and  another  one  isdiscontinuous conduction mode.
D 6M U R 1 4 0D 7M U R 1 4 0D 8M U R 1 4 0D 9M U R 1 4 0D 1 1M U R 1 4 01 2L 13 2 0 uC1V 1F R E Q  =  5 0V A M P L  =  2 2 0V O F F  =  0V 2T D  =  0T F  =  0 . 0 1 uP W  =  5 uP E R  =  1 0 uV 1  =  1 0T R  =  0 . 0 1 uV 2  =  0
0
M 3I R F P 4 5 0
V -V +V -V +
Fig 1. Boost PFC circuit for simulationFig 2. Output of the Boost PFCThe simulated output wave form is shown in fig 2.The output is about 475V dc. Thus the converter boosts theinput 220V ac to 475V dc with 2.15 percent of Boost factor.Figure 3 shows the circuit diagram of CCM PFCconverter.  Some  stray  inductance  is associated  with  thelayout and the parasitic capacitance at the device drain nodeis also depicted.
p a r a s i t i c1 2D 2M 1
1
2
 
3
p a r a s i t i c1 2
0
D 3p a r a s i t i c1 2D 5p a r a s i t i c12p a r a s i t i c1 2D 4p a r a s i t i cC 1V 1R 1L 11 2D 1
Fig 3.  Schematic of the PFC with parasiticThe hardware implementation of the converter is far more  complex  than  its  schematic.  For  the  purpose  of conducted  EMI  modeling  the  circuit  diagram  must  beconverted into a far more complex and detailed simulationcircuit that can cover the essential EMI characteristics of thereal hardware up to 30MHz. (F.C.Lee, W.G.Odendaal -2004)The inductor in this 100 KHz PFC circuit (F.C.Lee,W.G.Odendaal  -2004) uses 77083A core from MagneticsCorporation with the two cores stacked together. The 49 turnwinding  employs  AWG16  wire.  Using  an  impedanceanalyzer Agilent 4294A, the impedance magnitude and phasecan be measured in the frequency range up to 110 MHz.A second order model of the inductor is developedfirst. But to represent the impedance characteristics of thePFC inductor up to 30 MHZ, a more complex, higher order model is developed.This higher order model is shown in the fig 4.Fig 4 Higher order inductor modelFig 5 shows the equivalent circuit of the capacitor.This simple network equivalent circuit will provide a goodapproximation of the impedance characteristics up to 30MHz for the capacitors.Fig 5. Equivalent circuit of capacitor This model includes equivalent series inductance(ESL) and the Equivalent series resistance (ESR) of thecapacitor.2
 
The capacitance, ESR, ESL are 125.9nF, 26.2 milliohms, 7.0nH respectively as shown in fig 6. In the realhardware  another  ceramic  capacitor  is paralled  with  theoutput capacitor (F.C.Lee, W.G.Odendaal -2004).Fig 6. Capacitor modelLISN presents defined standard impedance to the EUT power input terminals at high frequencyAny incoming unwanted conducted EMI on the mains power supply is filtered out by the LISN and a clean input power supply is provided to the EUTFigure  7  shows  a  LISN  circuit  used  in  thissimulation model.Fig 7. LISN modelIII PREDICTION OF CONDUCTED EMI IN BOOST PFCCIRCUITFigure 8 shows the detailed simulation circuit, consideringall the parasitic parameters.Input is 220V ac supply with a frequency of 50 Hz. Thediodes used in the simulation are MUR140.The inductor andthe capacitor is considered with parasitic models.The MOSFET circuit used in the simulation is IRPF450.thegate drain parasitic parameters also modeled. The gate drivecircuit used here is a square pulse generator with a frequencyof 100 KHzFig 8.Detailed simulation circuitFig 9. FFT of EMI spectra in log scaleFrom  the  simulation  output,  the  maximumfrequency  at  which  the  maximum  conducted  EMI ispredicted as 10 KHZ and the maximum voltage is about11.093  mV.  But  this  is  not  matches  exactly  with  themeasured results (F.C.Lee, W.G.Odendaal -2004), because of the variation in the MOSFET model.The conducted  EMI is reduced using  EMI filters.The  following  chapter  explains  power  line  filter 3
C 29 pC 80 .9 2 nC 9 21 2 5 . 9 nC 1 42 7 9 uC 1 51 1 .1 8 pD 1M U R 1 4 0D 2M U R 1 4 0D 3M U R 1 4 0D 4M U R 1 4 0D 5M U R 1 4 01 2L 13 7 5 u1 2L 23 .8 u12L 3 27 n12L 49 .9 6 n1 2L 61 9 n1 2L 71 4 . 1 n1 2L 84 9 .5 n12L 1 01 0 . 6 n1 2L 1 21 . 2 uR 10 .0 4 1R 26 7 .5 kR 36 . 8 kR 61 5 0 mR 73 0 5 mR 8 22 6 . 2 mR 1 01 5 012L 3 19 .9 6 nC 9 10 .9 2 nR 8 13 0 5 mC 91 2 5 .9 n12L 37 nR 82 6 .2 m1 2L 56 5 n12L 98 . 5 nC 1 02 2 .7 pC 1 12 2 . 7 p1 2L 1 14 7 . 6 n1 2L 1 33 9 . 5 n1 2L 1 42 . 7 nR 91 0 0 0 k
00
R 1 13R 1 291 2L 1 52 6 n1 2L 1 69 .9 nR 1 30 . 1V 1F R E Q  =5 0A M P L=  2 2 0O F F=  0
 
V 2T D=  0T F  =0 .0 1 uP W=5 uP E R  =1 0 uV 1=  1 0T R=  0 . 0 1 uV 2=  0R 1 45R 1 55C 1 21 0 uC 1 31 0 u1 2L 1 75 0 u1 2L 1 85 0 uC 1 2 10 .1 uR 1 4 15 0R 1 5 15 0C 1 3 10 .1 u
0
M 3I R F P 4 5 0M 4I R F P 4 5 01 2L 1 91 0 . 9 n
0
V -
 
V +

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